NOR type memory device, manufacturing method thereof and electronic equipment comprising same

Abstract

The invention discloses a NOR type memory device and electronic equipment comprising the same. According to an embodiment, the NOR-type memory device can comprise a NOR cell array and a peripheral circuit. The NOR cell array can comprise: a first substrate; an array of memory cells on the first substrate, wherein each memory cell comprises a first gate stack vertically extending relative to the first substrate and an active region surrounding a periphery of the first gate stack; first bonding pads electrically connected to the first gate stacks; and second bonding pads electrically connected to the active regions of the memory cells. The peripheral circuit can comprise: a second substrate; a peripheral circuit element on the second substrate; and third bonding pads, wherein at least a portion of which is electrically connected to the peripheral circuit element. The NOR cell array and the peripheral circuit are disposed such that at least some of the first and second bonding pads and at least some of the third bonding pads face each other.

Description

technical field [0001] The present disclosure relates to the field of semiconductors, and in particular, to a NOR type memory device, a method of manufacturing the same, and an electronic device including such a memory device. Background technique [0002] In a horizontal type device such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the source, gate and drain are arranged in a direction substantially parallel to the surface of the substrate. Due to this arrangement, the horizontal type device cannot be easily further scaled down. Unlike this, in a vertical type device, the source, gate, and drain are arranged in a direction substantially perpendicular to the substrate surface. Therefore, vertical devices are easier to scale down than horizontal devices. [0003] For vertical devices, integration density can be increased by stacking them on top of each other. However, this may result in poor performance. Because in order to stack multiple devices conve...

AI Technical Summary

Problems solved by technology

However, this may result in poor performance

Because in order to facilitate the stacking of multiple devices, polysilicon is usually used as the channel material, resulting in a larger resistance than the channel material of single crystal silicon

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