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Fan-out packaging method and fan-out packaging structure

A packaging method and packaging technology, which are applied to semiconductor/solid-state device components, semiconductor devices, electrical components, etc., can solve the problems of the package thickness of the fan-out packaging structure, improve reliability and stability, and simplify welding. The effect of the process

Active Publication Date: 2022-02-18
江苏芯德半导体科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Purpose of the invention: In order to solve the problem in the prior art that the package body of the fan-out packaging structure is relatively thick, the present invention provides a fan-out packaging method

Method used

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  • Fan-out packaging method and fan-out packaging structure
  • Fan-out packaging method and fan-out packaging structure
  • Fan-out packaging method and fan-out packaging structure

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0044] A fan-out packaging structure such as figure 1 As shown, it includes a package body 1, a first passive element 2, a substrate 3, a second filling layer 4, a metal ball 5 and a metal heat dissipation plate 6, and the package body 1 includes a plurality of chips 7, rewiring metal circuit layers 8, metal The bump 9, the first filling layer 10, the first plastic sealing layer 11 and the second plastic sealing layer 12, a plurality of chips 7 are connected to the rewiring metal circuit layer 8, and the rewiring metal circuit layer 8 includes a multi-layer metal layer and a designated opening position of the insulating layer, the metal bump 9 is set at the designated opening position, the first filling layer 10 is filled between the chip 7 and the rewiring metal circuit layer 8, and the first plastic sealing layer 11 wraps around the chip, the back, the chip and the chip Between them, the second plastic sealing layer 12 is located outside the first plastic sealing layer 11 an...

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Abstract

The invention discloses a fan-out packaging method and a fan-out packaging structure. A carrier plate made of light-transmitting material is taken, and a composite separation layer is coated on the carrier plate; a metal layer is sputtered on the composite separation layer; Re-wiring the metal circuit layer and the metal pad of the circuit layer; welding multiple chips on the re-wiring metal circuit layer; through the first plastic packaging, debonding to remove the carrier board, and the second plastic packaging to obtain a plastic-encapsulated wafer, on the plastic-encapsulated wafer Make metal bumps, cut them into independent packages after thinning, and then make metal balls to fan out high-density I / O into low-density package pins. The invention thins the entire package structure, which can effectively reduce the risk of damage to large-size wafers after being thinned and transported; improves the reliability and stability of the package structure; can be directly welded on the printed circuit board without being transferred to the substrate On, the welding process is simplified.

Description

technical field [0001] The invention belongs to the technical field of semiconductor packaging, and in particular relates to a fan-out packaging method and a fan-out packaging structure. Background technique [0002] With the improvement of IC technology, the chip area continues to shrink, and the number of transistors per unit area continues to increase. The chip area cannot accommodate enough pins, and traditional packaging cannot meet high-resolution chip packaging, so high-density packaging is derived. Fan-out packaging method. [0003] High-density fan-out advanced packaging follows the functional integration effect requirements of electronic products, improves performance and reduces size, and forms a technical product direction of high system integration, high-density interconnection, and large-size packaging. It is the most competitive solution for high-end electronic products. Technical solutions, this is the technical position that the world's major semiconductor ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/56H01L21/60H01L23/31H01L23/488H01L23/367
CPCH01L21/50H01L21/561H01L21/568H01L24/11H01L23/3135H01L24/14H01L23/367H01L2224/11H01L2224/119H01L2224/141
Inventor 陈文军潘明东张中梅万元
Owner 江苏芯德半导体科技有限公司