Semiconductor device, manufacturing method thereof and electronic equipment

Abstract

The invention discloses a semiconductor device, a manufacturing method thereof and electronic equipment, relates to the technical field of semiconductors, and aims to solve the problems that a cap layer is etched when a bit line is etched, so that the occupied space of a side wall formed around the bit line subsequently becomes large, the distribution becomes poor, and a side wall trailing structure is easy to form at the same time. The semiconductor device includes a substrate having a cell region, a peripheral region, and a partition region between the cell region and the peripheral region; a cap layer which covers the unit area and the partition area; a bit line contact structure which is located in the unit region and penetrates through the cap layer; a bit line located in the cell region, the bit line being formed on the bit line contact structure; and a sidewall forming control layer formed between the bit line contact structure and the bit line. The manufacturing method of the semiconductor device is used for manufacturing the semiconductor device. The semiconductor device provided by the invention is used for electronic equipment.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device, a manufacturing method thereof, and electronic equipment. Background technique [0002] Dynamic Random Access Memory (Dynamic Random Access Memory, abbreviated as DRAM) represents whether a binary bit (bit) is 1 or 0 by using the amount of charge stored in a capacitor. The structure of DRAM is simple, and each bit of data only needs one capacitor and one transistor to process. At the same time, the density of DRAM is high, and the capacity per unit volume is high, so the cost is low. [0003] As semiconductor storage elements become highly integrated, in the process of manufacturing DRAM, the cap layer will be etched during the process of etching the bit line material layer to form the bit line, so that the space occupied by the subsequent side walls formed around the bit line becomes larger , so that the space occupied by the sidewall is unevenly...

AI Technical Summary

Problems solved by technology

[0003] As semiconductor storage elements become highly integrated, in the process of manufacturing DRAM, the cap layer will be etched during the process of etching the bit line material layer to form the bit line, so that the space occupied by the subsequent side walls formed around the bit line becomes larger , so that the space occupied by the sidewall is unevenly distributed in the wafer and chip, and the distribution becomes worse. At the same time, it is easy to form a sidewall trailing structure, which affects the performance of the semiconductor device during the subsequent manufacturing process.

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