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Semiconductor package device and manufacturing method thereof

A packaging device and semiconductor technology, which is applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, and semiconductor/solid-state device components, etc., can solve the problems of through-hole electrical failure, complex through-hole manufacturing process, poor bonding force, etc., and achieve cost Low, reliable electrical connection, high yield effect

Pending Publication Date: 2022-02-15
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] After the reliability test, it was found that there will be cracks and delamination between the seed layer and the dielectric layer, which will cause the electrical failure of the through hole
The reasons may be: poor bonding between the seed layer and the dielectric layer; the AR ratio (aspectratio, aspect ratio) of the through hole makes the aperture of the through hole small when it reaches the substrate, which leads to plating problems; the through hole process Complicated etc.

Method used

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  • Semiconductor package device and manufacturing method thereof
  • Semiconductor package device and manufacturing method thereof
  • Semiconductor package device and manufacturing method thereof

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Embodiment Construction

[0024] The specific implementation of the present invention will be described below in conjunction with the accompanying drawings and examples. Those skilled in the art can easily understand the technical problems solved by the present invention and the technical effects produced through the contents recorded in this specification. It should be understood that the specific embodiments described here are only used to explain related inventions, rather than to limit the invention. In addition, for the convenience of description, only the parts related to the related invention are shown in the drawings.

[0025] It should be noted that the structures, proportions, sizes, etc. shown in the accompanying drawings of the specification are only used to match the content recorded in the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementable aspects of the present invention. Limiting conditions, so there is no technic...

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Abstract

The invention relates to a semiconductor package device and a manufacturing method thereof. The semiconductor package device includes: a first redistribution layer; the first structure that is arranged below the first redistribution layer, and the first structure is provided with an open hole to expose a part of the first redistribution layer; the first conductive pad that is arranged on the lower surface of the first redistribution layer; the second conductive pad that is arranged on the lower surface of the first structure; and a first wire electrically connecting the first conductive pad and the second conductive pad.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductor packaging, in particular to a semiconductor packaging device and a manufacturing method thereof. Background technique [0002] Traditional FOSUB (Fan-Out Substrate, fan-out substrate) usually attaches the redistribution layer (RedistributionLayer) to the substrate through the adhesive layer, and the electrical connection between the redistribution layer and the substrate is through the through hole passing through the adhesive layer. And realize. In the process of forming the through hole, laser drilling is first performed on the surface of the redistribution layer toward the substrate to form a through hole through the dielectric layer, then a seed layer is made, and then conductive metal is filled. [0003] After the reliability test, it is found that there will be fracture and delamination between the seed layer and the dielectric layer, which will cause the electrical failure o...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/498H01L21/48
CPCH01L23/49822H01L23/49827H01L23/49816H01L23/49894H01L21/4857H01L21/486H01L21/4853H01L2224/02331H01L2224/02333H01L2224/02379H01L2224/02381H01L2224/0231
Inventor 呂文隆
Owner ADVANCED SEMICON ENG INC
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