Neural network reasoning chip, neural network reasoning method and terminal
A neural network and chip technology, applied in inference methods, neural learning methods, biological neural network models, etc., can solve problems such as unsatisfactory performance, power consumption and scalability, and reduce memory access energy consumption and improve energy efficiency. , the effect of strong scalability and flexibility
Pending Publication Date: 2022-03-11
GUANGDONG OPPO MOBILE TELECOMM CORP LTD
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[0004] However, both GPUs and FPGAs use general-purpose computing modules to process the calculations of different operators in neural network algorithms, so they are not ideal in terms of performance, power consumption, and scalability when doing deep learning.
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[0040] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It should be understood that the specific embodiments described here are only used to explain the related application, not to limit the application. It should also be noted that, for the convenience of description, only the parts related to the relevant application are shown in the drawings.
[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of the present application, and are not intended to limit the present application.
[0042] In the following description, references to "some embodiments" describe a subset of all possible embodiments, but ...
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The embodiment of the invention discloses a neural network reasoning chip, a neural network reasoning method and a terminal, the neural network reasoning chip comprises an SSP and a calculation module, and the calculation module is composed of a VSP, an MMP and a PSUM; the SSP is used for generating a control instruction according to the feature map and the neural network structure parameters; the VSP is used for generating a convolution calculation instruction and convolution calculation data based on the control instruction; the MMP stores weight data and is used for executing convolution calculation according to the convolution calculation instruction, the convolution calculation data and the weight data to obtain a first calculation result; and the PSUM is used for determining a convolution result according to the first calculation result.
Description
technical field [0001] The invention relates to the field of chip design, in particular to a neural network reasoning chip, a neural network reasoning method and a terminal. Background technique [0002] With the deepening of research in the field of deep learning, convolutional neural networks have been applied to various fields of computer vision. Research and experiments in recent years have shown that convolutional neural networks have shown absolute dominance over traditional computer vision algorithms in many image processing tasks such as target detection, face recognition, image classification, and semantic segmentation. [0003] The current neural network inference chip architecture mainly includes Graphics Processing Unit (GPU), Field Programmable Gate Array (Field Programmable Gate Array, FPGA) and Application Specific Integrated Circuit (ASIC). [0004] However, both GPUs and FPGAs use general-purpose computing modules to process the calculations of different op...
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IPC IPC(8): G06N3/063G06N3/04G06N3/08G06N5/04
CPCG06N3/063G06N3/08G06N5/04G06N3/045
Inventor 王智慧
Owner GUANGDONG OPPO MOBILE TELECOMM CORP LTD