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Delay unit and method for supporting lossless IP signal long-time delay

A long-time, delayer technology, applied in multiplex communication, time-division multiplex system, electrical components, etc., can solve the problems of poor expandability and short delay time of delayer

Pending Publication Date: 2022-04-05
HANGZHOU ARCVIDEO TECHNOLOGY CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Aiming at the problem of poor scalability and short delay time of the delayer in the prior art, the present invention provides a delayer and method supporting long-time delay of lossless IP signals

Method used

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  • Delay unit and method for supporting lossless IP signal long-time delay
  • Delay unit and method for supporting lossless IP signal long-time delay

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0039] A delayer supporting lossless IP signal long-term delay, in the X86 architecture, it includes a clock synchronization module, a data acquisition module, a delay buffer module, a packet header update module and a data transmission module;

[0040] A clock synchronization module, the clock synchronization module is used to realize data clock synchronization;

[0041] The data acquisition module, the data receiving module collects the data through the network card;

[0042] Delay cache module, used for caching the received data;

[0043] The packet header update module updates the data in the delay cache module, obtains the timestamp of the sent data through the clock synchronization module, and updates the timestamp information into the packet header;

[0044] The data sending module is used for sending data through the network card.

[0045] The clock synchronization module is a PTP clock synchronization module.

[0046] The data acquisition module collects data throu...

Embodiment 2

[0050] A method for supporting long time delay of lossless IP signal, in X86 architecture, is characterized in that, includes clock synchronization module; method comprises:

[0051] Synchronization of the clock, the synchronization of the data clock of the delayer is realized through the clock synchronization module;

[0052] Data collection, collect the data through the network card, and transfer the collected data to the memory through DMA;

[0053] For data caching, the delayer caches the collected data through JPEG-XS shallow compression and secondary caching;

[0054] To update the packet header, obtain the timestamp of data transmission through the clock synchronization module, and update the timestamp information to the packet header;

[0055] The sending of data, the data is sent through the network card, and the data is transferred from the memory to the network card through DMA.

[0056] For data caching, the data is stored in the order of the time stamp of the ca...

Embodiment 3

[0058]Based on the foregoing embodiments, the PTP clock synchronization module can realize data clock synchronization, and the time is accurate to millisecond level. Through the PTP clock synchronization module, the accuracy of the delay time of the delayer can be guaranteed to reach the millisecond level, which meets the frame-level requirements of radio and television production.

[0059] The delayer adopts Matron DSX LE5 Q25 2110-21 network card to realize data collection, and the delayer directly relocates the 2110-21 raw data to the Optane memory through DMA, which greatly reduces the CPU load and improves the data processing speed.

[0060] The delayer cache module adopts JPEG-XS shallow compression and secondary cache mode, and stores data in different ways according to the time stamp sequence of cached data. At this time, the threshold K is set to 60s; The cached data is visually lossless and lightly compressed through JPEG-XS and stored on the hard disk. When sending,...

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Abstract

The invention relates to a multimedia audio and video processing technology, and discloses a delayer and method for supporting lossless IP signal long-time delay, in an X86 architecture, the delayer comprises a clock synchronization module, a data acquisition module, a delay cache module, a packet header updating module and a data sending module; the clock synchronization module is used for realizing data clock synchronization; the data receiving module collects data through a network card; the delay cache module is used for caching the received data; the packet header updating module is used for updating the data in the delay cache module, acquiring a timestamp for sending the data through the clock synchronization module, and updating timestamp information into a packet header; and the data sending module is used for sending data through the network card. On the basis of an X86 server architecture, large-data-volume delay data storage is realized by utilizing an intel tentative memory and a hard disk, and the method is suitable for a domestic server. A hour-level delay solution is provided for broadcast television and internet video users, and the latest requirements of customers are smoothly met through software upgrading.

Description

technical field [0001] The invention relates to multimedia audio and video processing technology, in particular to a delayer and method supporting long-time delay of lossless IP signals. Background technique [0002] In the era of standard definition and high definition, in-stage production and broadcasting, studio, master control and other systems use SDI to transmit uncompressed audio and video data. With the expansion of new media services and the advent of the 4K / 8K ultra-high-definition era, the traditional technical architecture based on SDI baseband video interface and dedicated SDI digital video matrix can no longer meet the needs of broadcasting and television services in terms of bandwidth, scalability, and flexibility. need. [0003] 8K resolution video raw data needs to occupy 48GBPS bandwidth, and SDI supports a maximum bandwidth of 12GBPS; SDI cables are coaxial cables, and service upgrades require re-drilling and wiring, which has poor scalability and low fle...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04J3/06H04L67/5682
Inventor 陈家兴叶建华陈左乐马威高铁铸
Owner HANGZHOU ARCVIDEO TECHNOLOGY CO LTD
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