SONOS memory and preparation method thereof

Abstract

According to the SONOS memory and the preparation method thereof provided by the invention, the SONOS memory comprises a substrate, a shallow trench isolation structure and an active region are arranged in the substrate, the shallow trench isolation structure is used for isolating the active region, the height of the top surface of at least part of the shallow trench isolation structure is lower than that of the top surface of the active region, and the thickness of the shallow trench isolation structure is smaller than that of the active region. The top surface of the active region is in a wave shape, a sawtooth shape or a square wave shape; the ONO layer is positioned on the substrate and covers the shallow trench isolation structure and the active region along the shape; and the grid polycrystalline silicon layer is positioned on the ONO layer. The height of a part of the shallow trench isolation structure is lower than the height of the active region, so that a part of the side wall of the active region is exposed, or the area of the upper surface of the active region is increased, so that the effective contact area of the ONO layer and the active region is increased, the charge storage capacity of the SONOS memory is enhanced, and the voltage threshold value of the SONOS memory is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a SONOS memory and a preparation method thereof. Background technique [0002] Flash memory (Flash memory) is a non-volatile memory developed based on Erasable Programmable Read-Only Memory (EPROM) and Electrically Erasable Programmable Read-Only Memory (EEPROM). The feature of convenient and rapid multiple erasing and writing has been widely used in portable devices, embedded systems and automotive electronics since its inception. However, since the flash memory with floating gate structure requires high-voltage operation in the process of reading, writing and erasing, CMOS does not require high-voltage operation; flash memory has a double-layer polysilicon structure with a floating gate and a storage gate, while CMOS is a single-layer polysilicon structure, therefore, the integration between flash memory and CMOS devices is more difficult and the process is more comp...

AI Technical Summary

Problems solved by technology

[0003] SONOS memory realizes the tunneling of charges from the drain region to the silicon nitride layer by applying a voltage between the storage gate and the drain, and is trapped by traps in the silicon nitride layer. The ability of SONOS memory to store charges is the threshold voltage It is closely related to the characteristics of the ONO film in the storage gate and the effective area between the ONO film and the active area of ​​the substrate, but the process of the ONO film in the existing process is relatively stable, and the voltage threshold of the SONOS memory is small

Images