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Semiconductor device and manufacturing method thereof, memory and electronic equipment

A manufacturing method and semiconductor technology, applied in the field of memory, electronic equipment, semiconductor devices and their manufacturing methods, can solve the problems of device size increase, signal input/output time increase, etc., to solve the problem of device size increase and increase processing cost, ease of implementation

Pending Publication Date: 2022-04-12
INST OF MICROELECTRONICS CHINESE ACAD OF SCI +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In order to solve the problems of enlarged device size and increased signal input / output time in the existing solutions of the hammer effect, the disclosure provides a semiconductor device and its manufacturing method, memory, and electronic equipment, which can be used without affecting the original Suppression of hammer effects without device performance and size

Method used

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  • Semiconductor device and manufacturing method thereof, memory and electronic equipment
  • Semiconductor device and manufacturing method thereof, memory and electronic equipment
  • Semiconductor device and manufacturing method thereof, memory and electronic equipment

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Embodiment Construction

[0034] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present disclosure.

[0035] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for clarity of presentation. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, s...

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Abstract

The invention provides a semiconductor device and a manufacturing method thereof, a memory and electronic equipment. The semiconductor device comprises a first isolation structure, a second isolation structure and the like which are arranged on a semiconductor substrate. The first isolation structure is arranged around the first gate stack and the second gate stack, and the second isolation structure is arranged between the first gate stack and the second gate stack. The method comprises the following steps: forming a first isolation structure and a second isolation structure on a semiconductor substrate; and forming a first gate stack and a second gate stack which are separated by a second isolation structure in an area enclosed by the first isolation structure, and forming a bit line contact part on the second isolation structure. The memory comprises the semiconductor device in any embodiment of the invention. The electronic device includes a memory. On the premise that the original size and performance of the semiconductor device are not changed, the hammering effect can be effectively restrained, and therefore the problems that the device size is increased, and the signal transmission time is prolonged in an existing scheme of additionally adding circuits are thoroughly solved.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductor devices, and more specifically, the present disclosure relates to a semiconductor device, a manufacturing method thereof, a memory, and an electronic device. Background technique [0002] With the refinement of the manufacturing process of semiconductor devices such as Dynamic Random Access Memory (DRAM, Dynamic Random Access Memory), the row hammer effect (Row Hammer) often occurs when the size of the device is reduced. The hammer effect refers to the phenomenon that when a certain transistor is repeatedly accessed within a certain period of time, the transistor sharing the bit line with the transistor will be turned on, resulting in the loss of information in the capacitor; the hammer effect is often an inevitable phenomenon of miniaturized DRAM. [0003] In order to overcome the row hammer effect, a conventional method is to repeatedly measure the number of accesses on a specific...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/108H01L21/8242H10B12/00
Inventor 李相惇赵劼杨涛张欣
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI