Inter-chip data interaction system and method based on Soc and FPGA

Abstract

The invention provides an inter-chip data interaction system and method based on an SoC and an FPGA. The inter-chip data interaction system comprises a power supply management module, a control module and a data interaction module, wherein the power supply management module is used for performing power-on and power-off control, fan power supply and speed grade control and node state query on the FPGA; the bit stream file loading module is used for acquiring an FPGA loading state and a bit stream file MD5 value according to the queried node state, and carrying out bit stream file loading management; and the data channel processing module is used for performing data channel resetting, data channel reading and data channel writing. According to the data interaction mode provided by the invention, the interface requirements of the Soc and the FPGA are comprehensively met, the data interaction between the Soc and the FPGA can be completely realized, and the calculation performance is improved.

Description

technical field [0001] The present invention relates to the technical field of data interaction, in particular to a system and method for inter-chip data interaction based on Soc and FPGA. Background technique [0002] Due to the advent of the big data era, there are great requirements for data processing. Currently, it is mainly processed by Znyq Soc or pure FPGA chips, and the processing capacity is limited to a certain extent. Therefore, based on the current situation, Zynq Soc plus multiple pure FPGA chips is used to improve the data processing capability. [0003] Patent document CN103488607A (application number: CN201310404188.1) discloses a communication system and method between an SOC processor and an FPGA chip under an embedded linux platform. Most of the solutions adopted in this solution are directly connected between the Soc and the internal modules of the FPGA chip through external pins, and the interface part is not designed. The mode and content of data inte...

AI Technical Summary

Problems solved by technology

Most of the solutions adopted in this solution are Soc and the internal modules of the FPGA chip are directly connected through external pins, and the interface part is not designed. The method and content of data interaction are single, and the control logic is single.

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