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Soft passivation layer in semiconductor fabrication

A technology of integrated circuits and dielectric layers, which is used in circuits, semiconductor/solid-state device manufacturing, electrical components, etc., and can solve problems such as inability to accommodate advanced fuses that occupy space

Inactive Publication Date: 2004-03-31
SIEMENS AG +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, existing photosensitive polyimides cannot accommodate the design of advanced fuses with a smaller footprint

Method used

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  • Soft passivation layer in semiconductor fabrication
  • Soft passivation layer in semiconductor fabrication
  • Soft passivation layer in semiconductor fabrication

Examples

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Embodiment Construction

[0031] This invention relates to the formation of TV holes in photosensitive polyimide. figure 1 A cross-section of a portion of a semiconductor integrated circuit (IC) is shown. The IC is, for example, a memory circuit such as random access memory (RAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), static RAM (SRAM), or read-only memory (ROM). In addition, the IC may also be a logic device such as a programmable logic array (PLA), an application specific integrated circuit (ASIC), an embedded DRAM logic integrated circuit (embedded DRAM), or any other circuit device.

[0032] Typically, many integrated circuits are formed simultaneously on a semiconductor wafer, such as a silicon wafer. After processing is complete, the wafer is diced to separate the ICs into individual chips. These chips are then packaged into final products for use in consumer products such as computer devices, cellular phones, personal digital assistants (PDAs), and other products.

[0033] As shown, t...

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PUM

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Abstract

The use of an etch stop layer to define a terminal via opening to access a device feature after formation of a photosensitive soft-passivation layer. The etch stop layer allows the size of the terminal via opening to be decoupled from the resolution capabilities of current photosensitive soft-passivation layer.

Description

technical field [0001] The present invention generally relates to semiconductor manufacturing techniques and soft passivation layers. In particular, it relates to a method of manufacturing integrated circuits. Background technique [0002] In the manufacturing process of semiconductor devices, it is often necessary to form an insulating layer, a semiconductor layer and a conductive layer on a substrate. These layers are patterned to form some features and spaces. The minimum size or feature size (F) of these features and spaces depends on the materials used and the resolution of the lithographic system. These patterns and spaces are patterned to form devices such as transistors, capacitors, and resistors. These devices are then connected to produce the desired electrical function, producing an integrated circuit (IC) or chip. [0003] Fuses are used to change the interconnection of the IC after standard processing is done. The ability to change the interconnections with...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/82H01L23/31H01L23/525
CPCH01L23/5258H01L2924/1433H01L2924/0002H01L2924/19041H01L23/3171H01L2924/00H01L21/50
Inventor 钱德拉塞克哈·纳拉扬贝蒂纳·丁克尔
Owner SIEMENS AG
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