Multi-lane traffic radar speed measurement calibration method and system
A radar speed measurement and calibration system technology, which is applied to radio wave measurement systems, instruments, etc., can solve the problem of low sensitivity, achieve the effects of improving work efficiency, improving speed measurement accuracy, and reducing difficulty
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Embodiment 1
[0046] The processor 14 converts the first analog switch 10 (i.e. figure 2 The pins IN1 and IN2 of the analog switch 1) are controlled to a low level state. At this time, the intermediate frequency signals IF and IFX of the radar front end pass through the first analog switch 10 through the NC1 and NC2 pins, and output signals IF_CH and IFX_CH. Next, the output radar signals IF_CH, IFX_CH enter image 3 In the FMCW module 11, the signal filtering processing of the normal working mode is performed, specifically, by image 3 The operational amplifiers U1A, U1B, U1C, and U1D in the middle FMCW module 11 , as well as the relevant resistors and capacitors, perform continuous frequency modulation filtering on the signals IF_CH and IFX_CH. Then, after the above amplification and processing, the signals IF_CH_P and IF_CH_N are output. Finally, the processor 14 switches the second analog switch 13 (i.e. figure 2 The pins IN1 and IN2 of the analog switch 2) are controlled to a low ...
Embodiment 2
[0049] The processor 14 converts the first analog switch 10 (i.e. figure 2 The pins IN1 and IN2 of the analog switch 1) are controlled to a high level state. At this time, the intermediate frequency signals IF and IFX at the front end of the radar pass through the first analog switch 10 through the NO1 and NO2 pins to output signals IF_CH and IFX_CH. Next, the output radar signals IF_CH, IFX_CH enter figure 2 In the CW module 12 of the speed measurement calibration mode, signal filtering processing is performed, specifically, by figure 2 The operational amplifiers U2A, U2B in the middle CW module 12 and the associated resistors and capacitors perform constant frequency modulation filtering on the signals IF_CH and IFX_CH. Then, after the above amplification and filtering processing, the signals IF_CH_P and IF_CH_N are output. Finally, the processor 14 switches the second analog switch 13 (i.e. figure 2 The pins IN1 and IN2 of the analog switch 2) are controlled to a hig...
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