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Packaging framework of power semiconductor module with low electromagnetic interference

A power semiconductor, low electromagnetic technology, applied in the direction of semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc., can solve the problem of power density reduction, system electromagnetic compatibility, power semiconductor module filtering effect and high-frequency absorption effect Unsatisfactory problems, to achieve the effect of increasing power density and reducing volume

Pending Publication Date: 2022-05-27
致瞻科技(上海)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The outward conduction emission of common mode interference and the instantaneous change and oscillation of current caused by transient voltage will cause interference emission, which will affect the electromagnetic compatibility of the system
[0003] At present, in order to solve the impact on the electromagnetic compatibility of the system when the power semiconductor module is switched on and off, filter elements or high-frequency absorption circuits are usually added outside the power semiconductor module. The frequency absorption effect is not ideal, and the power density of the system is also reduced to a certain extent, so it is necessary to improve and optimize the existing power semiconductor modules

Method used

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  • Packaging framework of power semiconductor module with low electromagnetic interference
  • Packaging framework of power semiconductor module with low electromagnetic interference
  • Packaging framework of power semiconductor module with low electromagnetic interference

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0039] The packaging structure of the power semiconductor module with low electromagnetic interference provided in this embodiment includes a first power semiconductor module 2 and a second power semiconductor module 3 with the same structure, and both the first power semiconductor module 2 and the second power semiconductor module 3 include Filter absorption chip 4 , power semiconductor chip 5 .

[0040] like figure 2 As shown, the lead frame 1 is provided with an insulating substrate 6 , two separate first conductor layers 7 are provided on the insulating substrate 6 , and two power semiconductor chips 5 are respectively provided on one first conductor layer 7 .

[0041] In this embodiment, as figure 2 As shown, the filter absorption chip 4 is a common mode filter capacitor, and the first electrode (also referred to as the upper surface electrode) of the common mode filter capacitor is connected to the first conductor layer 7 through the bonding wire 8 to realize common m...

Embodiment 2

[0047] The packaging structure of the power semiconductor module with low electromagnetic interference provided in this embodiment includes a first power semiconductor module 2 and a second power semiconductor module 3 with the same structure, and both the first power semiconductor module 2 and the second power semiconductor module 3 include Filter absorption chip 4 , power semiconductor chip 5 .

[0048] like image 3 As shown, the lead frame 1 is provided with an insulating substrate 6, and the insulating substrate 6 is provided with four conductor layers separated from each other, including two first conductor layers 7 and two second conductor layers 10, and the power semiconductor chip 5 is arranged on the on a first conductor layer 7 .

[0049] In this embodiment, as image 3 As shown, the filter absorption chip 4 is a common mode filter capacitor, and the first electrode (also referred to as the upper surface electrode) of the common mode filter capacitor is connected ...

Embodiment 3

[0055] The packaging structure of the power semiconductor module with low electromagnetic interference provided in this embodiment includes a first power semiconductor module 2 and a second power semiconductor module 3 with the same structure, and both the first power semiconductor module 2 and the second power semiconductor module 3 include Filter absorption chip 4 , power semiconductor chip 5 .

[0056] like Figure 4 As shown, the lead frame 1 is provided with an insulating substrate 6 , two first conductor layers 7 separated from each other are provided on the insulating substrate 6 , and the power semiconductor chips 5 are respectively arranged on one first conductor layer 7 .

[0057] like Figure 4 As shown, the filter absorbing chip 4 in this embodiment is a high-frequency absorbing chip, the first electrode of the high-frequency absorbing chip is electrically connected to the first electrode of the power semiconductor chip 5 through the bonding wire 8, and the second...

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Abstract

The invention provides a packaging framework of a power semiconductor module with low electromagnetic interference, which comprises a first power semiconductor module and a second power semiconductor module which are integrated on a lead frame and have the same structure, and each of the first power semiconductor module and the second power semiconductor module comprises a filtering absorption chip and a power semiconductor chip. The power semiconductor chip is arranged on the first conductor layer of the insulating substrate on the lead frame, one end of the power semiconductor chip is electrically connected with the first electrode of the filtering absorption chip through a bonding wire, and the second electrode of the filtering absorption chip is grounded or electrically connected with the other end of the power semiconductor chip. The filtering absorption chip and the power semiconductor chip are integrated on the lead frame, so that the filtering absorption chip can be close to the power semiconductor chip, common-mode interference caused by the power semiconductor chip when the switch works can be filtered and / or absorbed, the size of the power semiconductor module can be reduced, and the power density of a system can be improved.

Description

technical field [0001] The invention belongs to the field of power semiconductors, and relates to a packaging technology of a power semiconductor module, in particular to a packaging structure of a power semiconductor module with low electromagnetic interference. Background technique [0002] A power semiconductor module is a combination formed by re-potting high-power electronic power devices according to a certain functional combination, which can achieve different functions according to the different packaged components. In the traditional design of power semiconductor modules, the parasitic capacitance to ground will cause common-mode interference to the power semiconductor devices during switching, and the power semiconductor devices will also generate transient voltages during switching. The outward conducted emission of common mode interference and the instantaneous change and oscillation of the current caused by the transient voltage will cause the interference emiss...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/495H01L25/16
CPCH01L23/49575H01L25/16H01L2224/49111H01L2224/73265H01L2224/0603H01L2224/48091H01L2224/48227H01L2224/48472H01L2924/00014
Inventor 朱楠邓永辉史经奎梅营徐贺
Owner 致瞻科技(上海)有限公司