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Semiconductor device structure with substrate biasing scheme

A semiconductor and substrate technology, which is applied in the field of operating semiconductor device structures with substrate bias, and can solve problems such as expensive silicon-on-insulator

Pending Publication Date: 2022-06-07
GLOBALFOUNDRIES U S INC MALTA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The buried oxide layer isolates the transistor body from the handle substrate, but silicon-on-insulator is expensive

Method used

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  • Semiconductor device structure with substrate biasing scheme
  • Semiconductor device structure with substrate biasing scheme
  • Semiconductor device structure with substrate biasing scheme

Examples

Experimental program
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Embodiment Construction

[0014] refer to figure 1 And in accordance with embodiments of the present invention, a semiconductor substrate 10 containing a single crystal semiconductor material such as single crystal silicon is provided. The semiconductor substrate 10 may be a bulk substrate (ie, a non-silicon-on-insulator substrate) containing a single crystal semiconductor material (eg, single crystal silicon). As used herein, non-silicon-on-insulator substrates (ie, non-SOI substrates) lack buried oxide layers. The single crystal silicon semiconductor material of the semiconductor substrate 10 may contain a finite level of defectivity and still be considered single crystal. In one embodiment, the semiconductor substrate 10 may be a high resistivity host substrate containing single crystal silicon having a resistivity greater than or equal to 1,000 ohm-cm. In one embodiment, the semiconductor substrate 10 may be a substrate containing a high resistivity host having a resistivity in the range of about...

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Abstract

The invention relates to a semiconductor device structure with a substrate bias scheme. A semiconductor device structure with a substrate bias, a method of forming a semiconductor device structure with a substrate bias, and a method of operating a semiconductor device structure with a substrate bias are disclosed. A substrate contact is coupled to a portion of the bulk semiconductor substrate in the device region. The substrate contact is configured to be biased with a negative bias voltage. The field effect transistor includes a semiconductor body in a device region of a bulk semiconductor substrate. The semiconductor body is electrically isolated from a portion of the bulk semiconductor substrate.

Description

technical field [0001] The present invention relates to semiconductor device fabrication and integrated circuits, and more particularly, to semiconductor device structures with substrate bias, methods of forming semiconductor device structures with substrate bias, and methods for operating semiconductor device structures with substrate bias method. Background technique [0002] Device structures such as field effect transistors tend to exhibit high capacitance and body-to-body leakage when formed using a bulk semiconductor substrate. One measure that can be taken to reduce susceptibility is to provide the bulk semiconductor substrate with triple well isolation that isolates the transistor body from the substrate. However, transistor switches with triple well isolation may exhibit poor linearity. Another measure to reduce sensitivity is to replace the bulk semiconductor substrate with a silicon-on-insulator (SOI) substrate, where a thin top silicon layer provides the active...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336H01L29/10
CPCH01L29/78H01L29/0649H01L29/66651H01L29/1079H01L29/1087H01L21/761H01L21/76267H01L21/763H01L21/76283H01L29/7801H01L29/0642H01L27/088H01L27/0285H01L27/0218H01L29/0619
Inventor 安东尼·K·史塔佩尔M·J·阿布-哈利勒约翰·J·艾利斯-蒙纳翰兰迪·沃夫亚文·J·乔瑟夫阿龙·瓦莱特
Owner GLOBALFOUNDRIES U S INC MALTA