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Aging screening device for anti-fuse FPGA (Field Programmable Gate Array) device

A screening device and anti-fuse technology, applied in the direction of measuring devices, instruments, electronic circuit testing, etc., can solve the problem of not providing the description and implementation method of the aging screening device.

Pending Publication Date: 2022-06-28
58TH RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, relevant foreign device manufacturers only provide part of the burn-in screening documentation on anti-fuse FPGA devices, and do not provide more detailed burn-in screening device descriptions and implementation methods. The present invention combines the characteristics of different types of anti-fuse FPGA devices , which discloses a specific implementation method of a general-purpose antifuse FPGA burn-in screening device

Method used

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  • Aging screening device for anti-fuse FPGA (Field Programmable Gate Array) device
  • Aging screening device for anti-fuse FPGA (Field Programmable Gate Array) device

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Embodiment Construction

[0018] like figure 1 and figure 2 As shown, this embodiment provides a burn-in screening device for an anti-fuse type FPGA device, which includes a data stream generation module, a burn-in station board and a burn-in driver board. Its block diagram is as follows: figure 1 shown. The boards are connected to each other through two 2.54mm pitch gold finger connection terminals. The terminal can be customized and installed on the high-temperature aging box of the specified type, so as to form a standard interface inside and outside the box, and realize the reliable connection between the station board and the drive board under high temperature. The connection terminal defines the bit numbers of the power channel, digital channel and analog channel, and the aging driver board and the aging station board can be independently designed according to this definition. Each component of the aging screening device will be described separately below.

[0019] The data flow generation m...

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Abstract

The invention relates to an aging screening device for an anti-fuse type FPGA (Field Programmable Gate Array) device, which comprises a data stream generation module, an aging driving board and an aging station board, the data stream generation module is realized by Matlab software, an excited JTAG (Joint Test Action Group) data stream file is generated through program design and algorithm iteration, and the aging station board is connected with the data stream generation module. The data stream generation module is in communication connection with the aging drive board through a digital channel; and the aging driving plate is connected with the aging station plate through a special interface. Serial data flow configuration is carried out through a JTAG boundary scan port, meanwhile, a large-capacity test code storage space and a plurality of programmable analog channels are arranged, and the working voltage and current of a device and the running state of the device are provided and monitored in real time; the method can meet the requirements of different types and scales of anti-fuse FPGA devices for hardware resources and bit stream capacity in aging screening, and has wide applicability.

Description

technical field [0001] The invention relates to the field of integrated circuit reliability testing, in particular to an aging screening device for anti-fuse type FPGA devices. Background technique [0002] Anti-fuse FPGA devices have the characteristics of high reliability, good confidentiality, and strong radiation resistance, and are widely used in complex environments and military fields. [0003] The combination of anti-fuse technology and FPGA realizes many advantages of anti-fuse FPGA devices. As the configuration memory unit of this type of FPGA device, the anti-fuse unit is in a high blocking open state before programming, and its resistance value is several hundred megaohms. After high-voltage pulse programming, it is in a low resistance connected state, and its resistance value is several. Ten ohms. The anti-fuse unit is a non-volatile memory unit with the characteristics of one-time programming, which makes it impossible for the anti-fuse FPGA to test and scree...

Claims

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Application Information

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IPC IPC(8): G01R31/317G01R31/3177G01R31/3183G01R31/3185G01R31/303
CPCG01R31/318519G01R31/318583G01R31/318536G01R31/31708G01R31/31718G01R31/3177G01R31/318307G01R31/303
Inventor 隽扬王斌斌熊永生曹振吉马金龙
Owner 58TH RES INST OF CETC
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