Method for measuring etching deviation of hard mask layer in self-alignment imaging process
A technology of hard mask layer and measurement method, which is applied in semiconductor/solid state device testing/measurement, electrical components, circuits, etc. problems, to reduce defects, reduce the influence of random factors, and improve accuracy
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0039] The embodiments of the present invention are described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0040] see Image 6 , the present invention provides a method for measuring the etching deviation of a self-aligned imaging process hard mask layer, comprising:
[0041] Step one, see Figure 3 to Figure 5 , design the main layout, the main layout includes the sacrificial layer pattern 20 (Mandrel) distributed at equal intervals in the X direction, the sacrificial layer pattern 20 (Mandrel) distributed in sequence with a fixed offset in the...
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com