Debugging method and device of chip simulation system and server

Abstract

The invention provides a debugging method of a chip simulation system, which relates to the technical field of chip circuit design verification, and comprises the following steps: when a monitoring instruction sent by a control terminal is received, reading a target configuration file corresponding to the monitoring control instruction; controlling a chip to be debugged in the chip simulation system, and running according to the excitation configuration file and the code configuration file to obtain a chip output signal; and performing signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result. According to the invention, the debugging time cost of the chip simulation system can be obviously reduced, and a more real chip use environment can be simulated, so that the debugging precision of the chip simulation system is improved.

Description

technical field [0001] The invention relates to the technical field of chip circuit design verification, in particular to a debugging method, device and server of a chip emulation system. Background technique [0002] The chip emulation system is a system that debugs the software by simulating the function of the real chip through the computer. At present, related technologies propose that mainstream chip simulation systems can provide incentives through test cases, and provide program execution codes through memory code Romcode, and compile the incentives and program execution codes together, so as to simulate and output a specific result. When the excitation / program execution code changes, it is necessary to recompile the simulation, which consumes a long time for verification, resulting in poor authenticity of the simulated chip usage environment, and the running status of the chip cannot be monitored in real time, resulting in the failure of the chip simulation system. ...

AI Technical Summary

Problems solved by technology

At present, related technologies propose that mainstream chip simulation systems can provide incentives through test cases, and provide program execution codes through memory code Romcode, and compile incentives and program execution codes together to simulate and output a specific result. When the stimulus / program execution code changes, all the simulation needs to be recompiled, which consumes a long time for verification, resulting in poor authenticity of the simulation chip use environment, and the running status of the chip cannot be monitored in real time, resulting in the failure of the chip simulation system. Debugging accuracy is low

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