Programmable normalized coprocessor data processing system and method

Abstract

The invention discloses a programmable normalized coprocessor data processing system and method, and the method designs a general data processing architecture, reduces the occupation of logic resources, improves the data processing speed, reduces the calculation amount of software, normalizes the processing of complex and various types of data, and is efficient, flexible and universal. The method has been successfully applied to development of a satellite-borne new-generation miniature static infrared earth sensor.

Description

technical field [0001] The invention relates to the field of data processing, in particular to a data processing method for a programmable normalized coprocessor. It is suitable for the development of a new generation of miniature static infrared earth sensors. Background technique [0002] As an important attitude measurement product of space vehicle, infrared earth sensor is widely used in aircraft control subsystem. By measuring the relative position of the body and the earth, through data fusion and attitude calculation, the body's pitch and roll direction attitude information relative to the earth is obtained. [0003] In the development process of the new generation of miniature static infrared earth sensor, an all-digital design scheme is adopted, and at the same time, it meets the requirements of miniaturization and low-cost development. It needs to complete the functions of image data sorting, image denoising, image compensation algorithm, image non-uniformity cor...

AI Technical Summary

Problems solved by technology

[0005] (1) The source image data is sorted and calculated using MCU software. Due to the limitation of processing speed and storage space, the hysteresis is serious, and it cannot match the image data refresh rate and attitude settlement cycle requirements. Hardware acceleration is necessary.

[0006] (2) Hardware acceleration is carried out through FPGA. Traditional hardware acceleration methods have fixed functions. During the research and development process, in the face of changes in algorithm schemes, data sorting and data processing optimization adjustments, it is necessary to continuously redesign, increase the difficulty of research and development, and lengthen the research and development cycle.

[0007] (3) To complete the full-process processing function of the above image data, the internal logic resources of the selected FPGA chip are insufficient and cannot be fully realized

Selecting a high-performance CPU+FPGA solution will greatly increase the cost of the whole product and cannot adapt to future commercial aerospace applications.

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