Pre-emphasis circuit and low-voltage differential signal driver

A low-voltage differential signal and pre-emphasis technology, applied in the field of data transmission, can solve the problems of common-mode signal interference and common-mode signal deterioration, and achieve the effect of reducing common-mode interference
CN114880263AActive Publication Date: 2022-08-09上海先楫半导体科技有限公司
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
上海先楫半导体科技有限公司
Publication Date
2022-08-09

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Abstract

The invention discloses a pre-emphasis circuit and a low-voltage differential signal driver, and the pre-emphasis circuit comprises a pulse generation and control module which is configured to generate a pre-emphasis pulse signal according to an external input signal; the at least one charging and discharging path is configured to provide pre-emphasis current for the LVDS driving circuit in response to the pre-emphasis pulse signal and directly connect the pre-emphasis circuit to the ground; wherein the charging and discharging path comprises a first PMOS (P-channel Metal Oxide Semiconductor) tube, a second PMOS tube, a first NMOS (N-channel Metal Oxide Semiconductor) tube, a second NMOS tube, a first blocking unit and a second blocking unit. According to the pre-emphasis circuit, the current trap is introduced into the charging and discharging path, a path to the ground is provided for the working current of the pre-emphasis circuit, and common-mode interference caused by the pre-emphasis circuit is effectively reduced.
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Description

technical field

[0001] The invention relates to the technical field of data transmission, in particular to a pre-emphasis circuit and a low-voltage differential signal driver. Background technique

[0002] As a high-speed serial data communication interface, the low-voltage differential signaling (LVDS) transmitter has been widely used in high-speed applications such as high-speed backplanes and processors, and is an important high-speed serial data interface.

[0003] figure 1 A circuit diagram of a conventional low voltage differential signal transmitter is shown. Signals pp and nn are a group of differential signals. When nn is high level and pp is low level, current I0 flows through PMOS transistor MP0, resistor R0, NMOS transistor Mn1 and resistor R1 in turn; otherwise, it flows through PMOS transistor MP1 in turn. , resistor R0, NMOS tube Mn0 and resistor R1. These two cases will form a positive and negative voltage drop of Vout=I0*R0=3.5mA*100Ω=350mV on the resisto...

Claims

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