Method of decreasing charges loss in non-volatile memory
A non-volatile memory and charge loss technology, which is applied in the manufacture of circuits, electrical components, semiconductors/solid-state devices, etc., and can solve the problems of cleaning unclean ions, residues, charge loss, etc.
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[0018] Please also refer to figure 1 and Figures 2A-2D . in, figure 1 It is a manufacturing flow chart according to the present invention. Figures 2A-2D It is a sectional view of the manufacturing process according to the present invention.
[0019] First, as in step 300, a semiconductor substrate 102 is provided, wherein the surface of the substrate 102 has any possible existing non-volatile memory devices 104, such as erasable programmable read-only memory (erasable programmable read-only memory; EPROM), electrically erasable programmable read-only memory (electrically erasable programmable read-only memory; EEPROM) or flash memory (flash memory)...etc. In this embodiment, a flash memory is taken as an example, and its device 104 includes a floating gate 104a, a dielectric layer 104b, a control gate 104c, and a tunnel oxide (tunnel oxide) 104d, as Figure 2A shown.
[0020] Next, as in step 302, a dielectric layer 106 is formed on the surface of the substrate 102 by ...
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