Manufacturing method of semiconductor assembly capable of improving lattice defect in silicon epitaxial layer

Abstract

The invention discloses a semiconductor component manufacturing method for improving crystal lattice defects in a silicon epitaxial layer, which comprises forming an isolation region, a gate structure, a lightly doped region of a source / drain, a gate spacer and a source in a semiconductor base. / Drain heavily doped region, and before the silicon epitaxial layer is formed, perform a rapid thermal annealing and cleaning to remove metal impurities, and then grow a silicon epitaxial layer on the gate structure and source / drain, in order to forming a raised source / drain structure; and finally performing a self-aligned metal silicide manufacturing method. The invention can avoid crystal lattice defects in the growth process of the silicon epitaxial layer, and can reduce the leakage current phenomenon of components.

Description

technical field [0001] The present invention relates to a semiconductor manufacturing method technology, in particular to a manufacturing method including raised source / drain (raised source / drain) and self-aligned metal silicide (self-aligned silicide, Salicide), and can improve Semiconductor component fabrication method for lattice defects in silicon epitaxial layers. Background technique [0002] When the manufacturing method of semiconductor components enters the deep sub-micron manufacturing method, and the integrated circuit becomes higher and higher, the area of ​​the source / drain region is also reduced, but it will increase the contact resistance of the source / drain terminal, which cannot In order to maintain the high current driving capability of the device, in order to reduce the resistance value of the device and increase the convenience of the layout of the subsequent connecting wires, the self-aligned metal silicide technology has gradually been widely used in th...

AI Technical Summary

Problems solved by technology

[0005] However, in the steps of the above-mentioned known semiconductor manufacturing method, when a silicon epitaxial layer 20 is grown on the source / drain 22 to form a raised source / drain structure, lattice defects are very likely to occur in the silicon epitaxial layer 20 The generation of crystal defects; and the defects generated in the crystal lattice of the silicon epitaxial layer 20 will cause the leakage current phenomenon in the shallow junction components, thereby affecting the characteristics and reliability of the components

Images