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Manufacturing method of flash storage having separated floating grid and its structure

A manufacturing method and separate technology, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of the continuous improvement of the integration degree of memory devices, and achieve the effect of improving the integration degree and increasing the storage capacity.

Inactive Publication Date: 2006-08-23
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, with the gradual increase of the integration level of memory devices and the gradual reduction in size, the known storage method of one bit per memory unit will be limited by design rules, making it difficult to continue to improve the integration level of memory devices.

Method used

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  • Manufacturing method of flash storage having separated floating grid and its structure
  • Manufacturing method of flash storage having separated floating grid and its structure
  • Manufacturing method of flash storage having separated floating grid and its structure

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Experimental program
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Embodiment Construction

[0023] The manufacturing method of the flash memory with split floating gate in the preferred embodiment of the present invention is as follows Figure 2A to Figure 2G shown.

[0024] First, please refer to Figure 2A A substrate 200 is provided, and an oxide layer 202 is formed on the substrate 200, wherein the material of the oxide layer 202 is, for example, silicon oxide, and the method for forming the oxide layer 202 is, for example, a thermal oxidation method. Next, a patterned sacrificial layer 204 is formed on the oxide layer, wherein the material of the sacrificial layer 204 is, for example, silicon nitride. The method of forming the sacrificial layer 204 is, for example, to form a material layer (not shown) on the oxide layer 202 , and then form a patterned sacrificial layer 204 by means of lithographic etching.

[0025] Next, please refer to Figure 2B , forming the source 206 and the drain 208 in the substrate 200, wherein the method of forming the source 206 and...

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Abstract

A preparing method of flash storage with separation floating grid provides substrate and an oxide layer and a sacrifice layer of patternization are formed on the substrate in sequence, and then to carry out the ion planting in step by using patternization sacrifice layer as a mask for forming shallow doping source / source of drain electrode / drain electrode in the substrate at two sides of the sacrifice layer. Two conductors gap walls are formed at the side wall of patternization sacrifice layer after the partial patternization sacrifice layer is removed by isotropic radiation etching, and then the remained gap walls of conductor are two floating grids after the oxide layer except that at conductor gap wall, and the patternization sacrifice layer is removed out, subsequently the media layer and the control grid are formed on the substrate in sequence.

Description

technical field [0001] The present invention relates to a method of manufacturing a memory and its structure, and in particular to a method of manufacturing a flash memory with a split floating gate and its structure. Background technique [0002] Read-only memory has the characteristics of saving data, so it has been widely used. Read-only memory includes mask read-only memory (Mask ROM), programmable read-only memory (Programmable ROM, PROM), erasable programmable read-only memory memory (Erasable Programmable ROM, EPROM), electrically erasable programmable read-only memory (Electrically Erasable Programmable ROM, EEPROM), and flash read-only memory (Flash ROM). [0003] In the read-only memory, the erasable programmable read-only memory has the advantages of being programmable, erasable, and saving data after power failure. For devices that need to be able to save data and update the saved data, such as It is a widely used memory device for the Basic Input Output System ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8246H01L27/112H10B20/00
Inventor 叶彦宏范左鸿蔡文哲刘慕义詹光阳卢道政
Owner MACRONIX INT CO LTD