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Bit line for memory assembly and method for making bit line contact window

A manufacturing method and contact window technology, applied in semiconductor/solid-state device manufacturing, electrical components, semiconductor devices, etc., can solve problems such as short circuits, achieve easy formation, improve the effects of easy short circuits, and low aspect ratio

Inactive Publication Date: 2007-04-04
NAN YA TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] Therefore, the object of the present invention is to provide a method for manufacturing bit lines and bit line contact windows of memory components, so as to solve the problem that the conventional bit line contact windows are easy to short circuit with adjacent bit lines.

Method used

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  • Bit line for memory assembly and method for making bit line contact window
  • Bit line for memory assembly and method for making bit line contact window
  • Bit line for memory assembly and method for making bit line contact window

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Embodiment Construction

[0038] FIG. 3A to FIG. 3I are schematic cross-sectional views of the manufacturing process of the bit line and the bit line contact window of the memory device according to a preferred embodiment of the present invention.

[0039] Referring to FIG. 3A , firstly, a substrate 200 is provided, wherein the substrate 200 has a memory cell region 230 and a peripheral circuit region 240 . Next, several gate structures 208 are formed in the memory cell region 230, wherein each gate structure 208 has a gate dielectric layer 202, a gate conductive layer 204, and a top cover layer 206, and the gate structure 208 The sidewalls also include spacers 210 formed therein. In a preferred embodiment, the material of the gate dielectric layer 202 is, for example, silicon oxide, the material of the gate conductive layer 204 is, for example, polysilicon, the material of the top cover layer 206 is, for example, silicon nitride, and the material of the spacer 210 is, for example, is silicon nitride....

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Abstract

. A manufacturing method for bit lines of a memory component and bit line contact windows is that a conduction layer is formed on the base to be covered by a grating structure then to be ground with a chemical mechanical grinding method until the top cover is exposed, then part of the conduction layer is removed and the conduction layer between two adjacent structures is remained for forming a bit line contact window, then the bit line is formed above the base electrically connected with the contact window, avoiding short circuit problem between bit line contact window with its adjacent window since its size is small.

Description

technical field [0001] The present invention relates to a manufacturing method of a semiconductor component, and in particular to a manufacturing method of a bit line and a bit line contact window of a dynamic random access memory. Background technique [0002] Memory, as the name implies, is a semiconductor component used to store data or data. In the storage of digital data, we are usually used to express the memory capacity in bits. Each unit used to store data in the memory is called a memory cell (Cell). The memory cells are arranged in an array in the memory, and each combination of row and column represents a specific memory cell address. Wherein, several memory cells listed in the same line or in the same column are connected in series by a common wire. DRAM is a memory component that uses charged and uncharged capacitors to store binary data. A capacitor represents a memory bit, and the binary data "0" or "1" stored in it represents the state of "charged" or "un...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L21/28H01L21/8239H01L21/304H01L21/3205H10B99/00
Inventor 吴国坚陈逸男
Owner NAN YA TECH
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