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Systems and methods using system-on-chip with soft cache

A cache, cache line technology, applied in the field of system-on-chip, can solve problems such as not easy work, and achieve the effect of improving efficiency

Inactive Publication Date: 2007-04-11
CIRRUS LOGIC INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, integrating the main functions of a digital music player into a single chip device is not an easy task

Method used

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  • Systems and methods using system-on-chip with soft cache
  • Systems and methods using system-on-chip with soft cache
  • Systems and methods using system-on-chip with soft cache

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Embodiment Construction

[0021] The principles of the present invention, and their advantages, are best understood by referring to the illustrated embodiments depicted in FIGS. 1-14 of the drawings, wherein like numerals indicate like parts.

[0022] 1 is a high-level functional block diagram of a system 100 of a system-on-a-chip employing the principles of the present invention. System 100 is based on a microprocessor core, a digital signal processor, a set of peripheral devices, and associated buses, each of which will be discussed in further detail below. Among possible applications of the system 100 are multi-standard portable audio devices that process digital audio data in formats such as aMP3, AAC, and MS-Audio.

[0023] In the preferred embodiment, system 100 includes an ARM7TDMI microprocessor core 101, available from ARM Ltd. Cambridge, United Kingdom. Microprocessor 101 is suitable for various functions, including interfacing with peripheral devices, compressing and decompressing data, and...

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Abstract

A soft cache system compares tag bits of a virtual address (the bits form N-21) with tag fields of a plurality of soft cache register entries (TAG0-TAG15), each entry associated with an index (0-15) to a corresponding cache lines in virtual memory. A cache line size for the cache line is programmable. When the tag bits of the virtual address (the number of bits form N-21) match the tag field of one of the soft cache entries, the index (0-15) from that entry is selected for generating a physical address. The physical address is generated using the selected index as an offset (the bis from 7-10) to a corresponding soft cache space in memory.

Description

technical field [0001] The present invention relates generally to integrated circuits, and more particularly to on-chip systems with soft caches, and methods of using such systems. Background technique [0002] Handheld personal electronics are becoming increasingly popular as new technologies produce purchasable devices with advanced functionality. One such appliance is a portable digital audio player, which downloads digital audio data, stores the data in readable and writable memory, and converts the data to audio at the user's request. Digital data is downloaded from a network or retrieved from fixed media such as a minidisk in one of several formats including MPEG Layer 3, ACC, and MS Audio protocols. An audio decoder, supported by appropriate firmware, retrieves the encoded data from memory, applies a corresponding decoding algorithm and converts the decoded data to analog form for use in headphones or other speaker systems. [0003] In the design and construction of...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/10G06F12/08
CPCG06F12/0886G06F12/0864G06F12/1045
Inventor 格里戈里·A·诺思
Owner CIRRUS LOGIC INC