Semiconductor memory with read amplifier

Abstract

A sense amplifier is connected to a pair of folded bit lines via selection gates. At the time of reading data in a memory cell connected to the bit line, the pair of folded bit lines enter a floating state. At this time, the selection gate is turned off to disconnect the bit line from a sense node. After that, a potential is supplied to the bit line from an equalizer. Consequently, a semiconductor memory device of the invention can suppress deterioration in charge holding capability of a memory cell and prevent erroneous operation.

Description

(1) Technical field [0001] The present invention relates to a semiconductor memory, and more particularly, to a semiconductor memory having a folded bit line arrangement. (2) Background technology [0002] 15 is a schematic block diagram showing the structure of a memory cell array and its peripheral circuits of a conventional folded bit line semiconductor memory. [0003] The memory cell array 30 includes a plurality of blocks BK0 to BKn. Each block respectively includes: a plurality of folded bit line pairs BL and / BL; a plurality of word lines WL; and a plurality of memory cells MC. Each of the plurality of sense amplifiers 100 is connected to one pair of bit lines BL and / BL. [0004] Referring to FIG. 15, in the folded bit line type semiconductor memory, each sense amplifier 100 is connected to one bit line pair BL and / BL. Therefore, the number of sense amplifiers inside the semiconductor memory can be reduced to about half compared with conventional ones. [0005]...

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Problems solved by technology

However, since the closed readout mode itself is sensitive to ground noise or line-to-line nois

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