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Ferroelectric monotube latching structure and flushbonding type non-volatile logic IC

A single-tube, ferroelectric technology, applied in circuits, electrical components, information storage, etc., can solve the problems of slow reading and writing speed, readable and writable, limited erasing times, weak anti-irradiation ability, etc., to save energy. consumption effect

Inactive Publication Date: 2003-10-08
FUDAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Although currently on the market there are E 2 PROM, Flash Memory and other semiconductors do not volatile read and write memory, but due to their own shortcomings: (1) The read and write speed is slow, in the order of ms; (2) The working voltage is high, and a booster pump circuit is required to increase the The number and area of ​​devices; (3) the number of times that can be read, written and erased is limited; (4) the anti-radiation ability is weak, making it difficult for these non-volatile memory devices to match with high-speed, low-power digital circuits to realize embedded non-volatile logic

Method used

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  • Ferroelectric monotube latching structure and flushbonding type non-volatile logic IC
  • Ferroelectric monotube latching structure and flushbonding type non-volatile logic IC
  • Ferroelectric monotube latching structure and flushbonding type non-volatile logic IC

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Embodiment Construction

[0031] Since the flip-flop is the basic unit of the sequential logic circuit in the digital system, an example of applying the ferroelectric single-transistor latch structure to the D flip-flop to form a non-volatile frequency divider is given below.

[0032] Figure 5 It is a structural diagram of a non-volatile frequency divider realized by a ferroelectric single-transistor latch structure. Among them, the dotted line box is a two frequency division circuit composed of D flip-flops. Node 1 connects transmission gate 1 to node 2, wherein, the NMOS transistor gate of transmission gate 1 is controlled by clock signal clk ( Figure 5 The transmission gates in are only labeled with the NMOS control signal, since the PMOS control signal is complementary to the NMOS, so the label is omitted in the figure). Node 2 connects the input of inverter I to node 3. Node 3 connects the input of inverter II to node 4. Node 4 is connected to the transmission gate II and returns to node 2, ...

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Abstract

Combining the ferroelectric monotube unit, the transfer gate, the resistances, the phase inverter and the logic gates etc digital circuit basic units constitute the fereoelectric monotube latching structure. The structure the function of latching the logic states of the digital circuit. Thus, non-volatile logic of whole chip can be realized by embedding the ferroelectric monotube latching structure into Large Scale Integrated circuits.

Description

technical field [0001] The invention belongs to the technical field of large-scale digital integrated circuits, and in particular relates to a ferroelectric single-tube latch structure and an embedded non-volatile logic integrated circuit realized by the circuit structure. Background technique [0002] Large-scale digital integrated circuits are generally volatile: when the power is turned off, the information stored in the digital system will be lost; when the power is turned on again, the information stored in the digital system immediately before the power failure is still irrecoverable. [0003] If the volatile information in the digital system is written into the non-volatile memory array through a certain addressing mechanism when the power is off, and then the information is read from the non-volatile memory to the corresponding logic node of the digital system when the power is turned on, Non-volatile logic information can be realized. However, due to the need for c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/22H01L27/00
Inventor 林殷茵汤庭鳌谢宇涵
Owner FUDAN UNIV
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