Transistor integrated circuit optimization method for process transplantation

Abstract

The present invention relates to a technique for optimizing automatically an integrated circuit of transistor stage designed with respect to one process to be another integrated circuit of transistor stage adapted to the other process. The object of the invention is to provide a software which can optimize automatically the physical dimension, the area and the property of the integrated circuit of transistor stage transplanted with respect to the process. The invention comprises the following steps: ( 1 ) dividing the circuit; ( 2 ) optimizing the circuit in unit; ( 3 ) optimizing the circuit in entirety; ( 4 ) verifying the circuit. The invention converts the optimization of a large circuit to the same of the limited kinds of basic unit circuits; optimizes the basic unit circuits using analytical method; accelerates the simulation of the circuit according to the result of the division thereof, shortening the time required for optimizing the circuit in entirety and analyzes the mismatch of the matching signal path, optimizing the key signal path.

Description

technical field [0001] The present invention relates to a transistor-level integrated circuit optimization technology oriented to process migration, more specifically, the present invention relates to automatically optimizing a transistor-level integrated circuit designed on one integrated circuit process to be suitable for another integrated circuit process The technical field of transistor-level integrated circuits. technical background [0002] When updating the process of integrated circuits, it is necessary to optimize the integrated circuits designed in the past to the integrated circuits under the new process conditions under the premise of ensuring the circuit performance indicators, so as to minimize the area. It includes two steps: transistor-level circuit transplantation and physical layout-level circuit transplantation. It is impossible to realize the physical layout optimization technology directly oriented to process migration. It must go through three steps: ...

AI Technical Summary

Problems solved by technology

But this method of optimizing the circuit as a whole may lead to local optima instead of global optima

[0007] Although the circuit size is optimal, and the circuit simulation results also confirm that the circuit performance meets the requirements, such a circuit may not necessarily be able to be printed on the physical version. Figure 1 level implementation because the allowed layout parasitics are not considered when optimizing the circuit

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