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Vertical bipolar transistor and method of manufacturing the same

A gate, conductive type technology, applied in the field of vertical bipolar transistors and their manufacturing, can solve the problems of reducing the current amplification rate, increasing the impurity concentration of the well region, increasing the well concentration, etc., to achieve the effect of improving performance

Inactive Publication Date: 2005-08-24
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0011] In short, in the above-mentioned bipolar transistors, the impurity concentration in the well region increases with the miniaturization of the separation region, or the latch-up effect must be suppressed, and the current amplification factor must be reduced.
[0012] In addition, when further miniaturized, the well concentration increases and becomes denser, which further reduces its current amplification rate

Method used

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  • Vertical bipolar transistor and method of manufacturing the same
  • Vertical bipolar transistor and method of manufacturing the same
  • Vertical bipolar transistor and method of manufacturing the same

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Embodiment

[0056] Below, refer to Figure 1-Figure 7 , the structure of the vertical NPN bipolar transistor and the manufacturing method of the MOS transistor in the CMOS part are explained together.

[0057] like figure 1 As shown, in order to divide each region of the CMOS part and the bipolar part on the P-type silicon substrate 10, the separation region 11 is selectively formed by using STI. Then, the deep N-type well region 12 working as the collector region of the bipolar transistor, the P-type well region 13 working as the base region, and the lead-out region of the aforementioned collector region are selectively formed by ion implantation. N-type well region 14 . As described later, an N-channel MOSFET is formed in the P-type well region 13 of the CMOS portion, and a P-channel MOSFET is formed in the N-type well region 14 .

[0058] like figure 2 As shown, the gate structure Gs is formed using the gate formation process of the CMOS part. Simultaneously with this gate forma...

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Abstract

Provided is a vertical bipolar transistor with an increased current amplification rate, and to provide its manufacturing method. In the vertical bipolar transistor of a semiconductor device, a source-drain region 18c with a first conductivity type in a CMOS is formed as an emitter region 18a in a bipolar part, a first well region 13 with a second conductivity type is formed as a base region, and a second well region 14 with the first conductivity type or a semiconductor substrate 31 with the first conductivity type is formed as a collector region, respectively. It has an isolation structure Is provided to define the emitter region 18a on the first well region 13.

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method thereof, in particular to a vertical bipolar transistor and a manufacturing method thereof. Background technique [0002] Conventionally, in circuits that do not require high-performance bipolar transistors, bipolar transistors that can be manufactured in a CMOS process without increasing the number of steps have been used in order to reduce costs. [0003] This is to use the source / drain region of the first conductivity type as the emitter region, use the well region of the second conductivity type forming the source / drain region as the base region, and use the well region of the first conductivity type as the collector region . [0004] Figure 13 ~ Figure 17 A manufacturing process of such a conventional bipolar transistor is shown. [0005] That is, if Figure 13 As shown, for example, a separation region (STI) 51 is selectively formed on a P-type silicon substrate 50 . ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/331H01L21/8222H01L21/8248H01L21/8249H01L27/04H01L27/06H01L27/08H01L29/06H01L29/732H01L29/76
CPCH01L29/7322H01L29/0692H01L21/8249H01L27/0623H01L29/66272
Inventor 佐佐木元
Owner KK TOSHIBA