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Relatively prime mode parallel frequency divider based on congruence theory

A frequency divider, theoretical technology, applied in the field of high-speed digital frequency divider, can solve problems such as low failure frequency and complex control logic

Inactive Publication Date: 2005-10-26
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The present invention can solve the problem that the more digits (larger the modulus) of the existing frequency divider, the more logic gates are needed, the more complex the control logic required for state reversal, and the lower its failure frequency is.

Method used

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  • Relatively prime mode parallel frequency divider based on congruence theory
  • Relatively prime mode parallel frequency divider based on congruence theory

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specific Embodiment approach 1

[0007] Specific implementation mode one: combine figure 1 Describe the present embodiment, it is made up of a plurality of synchronous ring counters 1, multi-input AND gate 2; In each synchronous ring counter 1, the Q output end of a D-type flip-flop 1-1 corresponding to the frequency division number is connected to multiple On one input end of the input AND gate 2; the clock signal input ends of each D-type flip-flop 1-1 in each synchronous ring counter 1 are all connected to each other and are frequency divider input ends; in each synchronous ring counter 1 The SET setting terminal of the first D-type flip-flop 1-1 of the D-type flip-flop 1-1 and the CLR reset terminal of all other D-type flip-flops 1-1 are connected to the output terminal of the multi-input AND gate 2 and are the output terminals of the frequency divider. The numbers of D-type flip-flops 1-1 in the two synchronous ring counters 1 are all mutually prime numbers. The components in this embodiment can be comp...

specific Embodiment approach 2

[0008] Specific implementation mode two: combination figure 2 Illustrate this embodiment mode, present embodiment mode is increased in each synchronous ring counter 1 on the basis of specific embodiment one and has frequency division number programmable control circuit 3; Frequency division number programmable control circuit 3 is made of a plurality of two input AND gate 3-1, composed of multi-input OR gate 3-2; the Q output terminal of each D-type flip-flop 1-1 is respectively connected with one input terminal of a two-input AND gate 3-1, and each two-input AND gate The other input terminal of 3-1 is the frequency division number setting terminal, and the output terminals of each two-input AND gate 3-1 are all respectively connected with an input terminal of the multi-input OR gate 3-2, and the multi-input OR gate 3-2 The output terminals of -2 are respectively connected with one input terminal of the multi-input AND gate 2 . Other compositions and connections are the same...

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Abstract

A relative prime modulo parallel divider based on the congruent theory relates to the high-speed digital divider field. An output corresponding to the dividing number in each synchronous ring counter is connected to an input of 2, each clock signal input end of every type-D trigger in each counter is interconnected to be the input of the divider. The first SET end and all other CLR reset ends are connected to the output of 2 to be the output of the divider, the number of type D trigger in any two synchronous ring counters are primes mutually.

Description

Technical field: [0001] The invention relates to the technical field of high-speed digital frequency dividers. Background technique: [0002] In recent years, communication technology has developed very rapidly, and communication is developing to a higher frequency band. Frequency synthesis technology is a very important part of communication technology. The part with the highest frequency in the frequency synthesizer is the programmable N frequency divider and the voltage-controlled oscillator. The voltage-controlled oscillator is generally composed of discrete devices. High-frequency generation It is no longer a problem for modern communication technology, but obtaining high-precision and high-stability high-frequency signals is a problem that plagues the communication industry. Frequency synthesis technology can obtain high-precision and high-stability high-frequency signals. In the frequency synthesizer In , the programmable N divider is the high-frequency bottleneck th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K21/40
Inventor 付平孟升卫马云彤刘旺刘兆庆
Owner HARBIN INST OF TECH
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