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Structure of dynamic RAM

A dynamic random access and memory technology, applied in static memory, digital memory information, information storage, etc., can solve problems affecting component quality and yield, improve product yield and reliability, and avoid contact short circuit effects

Active Publication Date: 2006-04-19
PROMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, because the positions of some deep trench patterns 104 are too close, it is very easy to generate short-circuit defects 110 connected to the deep trench patterns 104 in the process, thereby affecting the quality and yield of component manufacturing, especially when the deep trench patterns When the aspect ratio (aspect ratio) of 104 increases day by day, the phenomenon of this kind of deep trench short circuit defect 110 will be more serious

Method used

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Embodiment 1

[0047] The present invention discloses a structure of a dynamic random access memory, referring to Figure 2A as shown, Figure 2A What is shown is a partial plan view of the substrate surface of a DRAM device according to the first preferred embodiment of the present invention.

[0048] First of all, the present invention separates the active areas of the mirror-connected design of existing memory cells and forms dislocations, as Figure 2A As shown in , the substrate 200 has independent active regions 202, and the deep trench patterns 204 are arranged in a checkerboard manner on each active region 202, wherein the active region 202 is, for example, a P-type silicon base The material is used as the lower electrode, and the inside of the deep trench pattern 204 is a capacitor structure. At the same time, the present invention also designs diagonally adjacent memory cells to share a contact plug to be electrically connected to the same bit line. For example, in this embodimen...

Embodiment 2

[0057] The present invention discloses another structure of dynamic random access memory, referring to image 3 , image 3 What is shown is a partial plan view of the substrate surface of a DRAM device according to the second preferred embodiment of the present invention.

[0058] exist image 3 Among them, in addition to the deep groove pattern 304 arranged in a checkerboard pattern, the substrate 300 also has a graphic design of a strip-shaped active area 302, wherein, this embodiment does not directly place the same strip-shaped active area Each memory cell unit on 302 defines an independently existing active area (such as Figure 2A shown in the active region 202 in ), but using a ring-shaped oxide layer photoresist mask 340, enabling the formation of ring-shaped oxide layers 350 with different heights in the deep trench pattern 304, in order to The active area of ​​each memory cell unit is separated.

[0059] With reference Figures 4A-4B , Figures 4A-4B Shown is a...

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Abstract

The DRAM structure arranges active region of each storage crystal cell on substrate solely; and designs pattern of deep groove as checkerboard type arrangement a fixed pitch is maintained between each adjacent pattern of deep groove. Active regions of diagonal adjacent each two storage units are connected electrically by using long type bit line contact plug. A contact window is setup at each long type bit line contact plug in order to connect bit line. Thus, same bit line can control diagonal adjacent storage units.

Description

technical field [0001] The invention relates to a structure of a dynamic random access memory, in particular to a structure of a dynamic random access memory with a checkerboard deep groove pattern to improve the integration of components. Background technique [0002] Dynamic random access memory (DRAM) devices are widely used in integrated circuits in the electronics industry for accessing binary data. However, as the integration level of semiconductor circuits continues to increase, the size of semiconductor elements must also be reduced. Therefore, in recent years, the manufacture of dynamic random access memory cells has developed the design of capacitors towards three-dimensional space, in order to cope with the small size of components. Due to the stringent requirements on the leakage current of components, there is even a dynamic random access memory cell designed to be composed of vertical transistors and deep trench capacitors located in deep trenches (deep trench;...

Claims

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Application Information

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IPC IPC(8): H01L27/108G11C11/34
Inventor 洪瑞源简荣吾
Owner PROMOS TECH INC
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