Structure of dynamic RAM

Abstract

The DRAM structure arranges active region of each storage crystal cell on substrate solely; and designs pattern of deep groove as checkerboard type arrangement a fixed pitch is maintained between each adjacent pattern of deep groove. Active regions of diagonal adjacent each two storage units are connected electrically by using long type bit line contact plug. A contact window is setup at each long type bit line contact plug in order to connect bit line. Thus, same bit line can control diagonal adjacent storage units.

Description

technical field [0001] The invention relates to a structure of a dynamic random access memory, in particular to a structure of a dynamic random access memory with a checkerboard deep groove pattern to improve the integration of components. Background technique [0002] Dynamic random access memory (DRAM) devices are widely used in integrated circuits in the electronics industry for accessing binary data. However, as the integration level of semiconductor circuits continues to increase, the size of semiconductor elements must also be reduced. Therefore, in recent years, the manufacture of dynamic random access memory cells has developed the design of capacitors towards three-dimensional space, in order to cope with the small size of components. Due to the stringent requirements on the leakage current of components, there is even a dynamic random access memory cell designed to be composed of vertical transistors and deep trench capacitors located in deep trenches (deep trench;...

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Problems solved by technology

However, because the positions of some deep trench patterns 104 are too close, it is very easy to generate short-circuit defects 110 connected to the deep trench patterns 104 in the process, thereby affecting the quality and yi

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