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Electrical connections in substrates

A technology of electrical connecting wires and electrical connections, which is applied in the field of manufacturing products and can solve problems such as unspecified manufacturing and complicated processes

Active Publication Date: 2006-06-21
SILEX MICROSYST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The process is quite complex and the publication does not explain how to fabricate a slab containing through electrical connections (vias) and whether it can be used as a generally suitable starting substrate for semiconductor applications

Method used

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  • Electrical connections in substrates
  • Electrical connections in substrates
  • Electrical connections in substrates

Examples

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example 1

[0071] Example 1 (Prior Art)

[0072] Figure 7 It is a previous electrical connection structure (corresponding to US-6002177). It consists of holes punched in the silicon chip and metallization of the inner walls of the holes to provide electrical connections between the two sides of the chip.

example 2

[0073] Example 2 (showing problems with standard trench etch)

[0074] Standard trench etching is performed on silicon wafers. The wafer has a diameter of 100 mm and a thickness of 500 μm.

[0075] To provide access, a patterned mask is placed on one surface (top) of the wafer using standard photolithographic techniques. The grooves in this example are simple "line" shaped grooves.

[0076] The etching process is so-called DRIE (Dry Reactive Ion Etching). Grooves were fabricated with depths varying between 200-400 μm and widths varying between 5-12 μm. Figure 8 An enlarged view of the top opening of the trench. It can be clearly seen from the figure that the opening is narrower than the width of the groove at about 10 μm downward. This phenomenon often results in insufficient filling of the trenches in subsequent oxide filling steps.

example 3

[0077] Example 3 (elimination of standard etch defects)

[0078] Therefore, in order to make up for this defect, a method such as Figure 2e Additional shallow etch shown in .

[0079] This processing step produces a strictly monotonic trench shape (see Figure 9a ), that is, the opening is the widest part of the trench and then gradually narrows. Figure 9b Shows some trench structures after shallow etch.

[0080] Filling this trench structure with oxide will result in a completely filled trench with no voids.

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Abstract

The present invention relates to a method of forming electrical connections between first (top) and second (bottom) surfaces of a conductive or semiconductive substrate. It includes forming a trench in the first surface and establishing an insulating enclosure completely separated from the portion of the substrate bounded by the trench. The invention also relates to a product usable as a starting substrate for the manufacture of microelectronic and / or micromechanical devices, comprising a flat substrate of semiconducting or conducting material and having a first and a second surface and at least one conducting element extending through the substrate . This conductive element is separated from the surrounding material of the flat substrate by a limited layer of insulating material and comprises the same material as the substrate, ie it is made of wafer material.

Description

technical field [0001] The present invention relates generally to the field of semiconductor technology and, more particularly, to a method of making a product that can be used as a starting substrate for the manufacture of many types of semiconductor devices. The invention also relates to such products. Background technique [0002] In many applications in the semiconductor industry (in a broad sense, including microelectronics, micro-optics, and micro-mechanics), it is often necessary to manufacture semiconductor devices (such as sensors, micromirror arrays, etc.) on both sides of semiconductor wafers (such as silicon wafers). element. [0003] Wire bonding is a common method used in previous techniques for packaging and interconnecting such devices. However, wire bonding is less economical, and for devices that require many interconnecting wires (such as array devices), it is simply impossible to fix these wires. Therefore, flip-chip mounting of electronic components w...

Claims

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Application Information

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IPC IPC(8): H01L21/768B81B7/00H01L21/60H01L23/48
CPCB81B7/0006H01L21/76898H01L23/481H01L2224/131H01L2924/1461H01L2224/05573H01L2224/13025H01L2924/00014H01L2924/014H01L2924/00H01L2224/05599H01L21/768H01L21/28
Inventor E·凯尔维斯滕T·埃贝福斯N·斯维丁P·朗斯滕T·胡陶亚
Owner SILEX MICROSYST
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