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Method and apparatus for decoding and verifying AVS video frequency

A technology of video decoding and verification method, applied in digital video signal modification, television, special data processing applications, etc., can solve the problems of AVS video decoding hardware, verification device and method, etc., and achieve shortened development cycle, low cost, Ease of use

Inactive Publication Date: 2006-07-12
无锡智科传感网技术股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Until now, there is no device and method for AVS video decoding hardware verification

Method used

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  • Method and apparatus for decoding and verifying AVS video frequency
  • Method and apparatus for decoding and verifying AVS video frequency
  • Method and apparatus for decoding and verifying AVS video frequency

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Experimental program
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Embodiment Construction

[0018] A kind of AVS video decoding verification method, comprises the following steps:

[0019] A. Determine the system architecture design of AVS video decoding and optimize the algorithm programming simulation to complete the system-level design;

[0020] B. Perform programming simulation for each functional module to complete the module-level design;

[0021] C. Utilize the system design tool to connect each functional module, build the system architecture of the event-level model (TLM) realized by decoding, and complete the simulation of the video decoding function on the system design platform;

[0022] D. Convert the module described in the programming language to the hardware description language to describe, complete the register transfer level (RTL) code of the module, and perform simulation;

[0023] E. After simulating and synthesizing the modules at the register transfer level, download them to the programmable logic device (FPGA) to accelerate the running speed ...

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PUM

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Abstract

The invention discloses an AVS video decoding test method and device in the information disposal domain, for information source coding and channel coding, which comprises the following steps: A. affirming the system frame design of AVS video decoding; optimizing the artificial programmed algorism; B. programming each functional mode; C. connecting each functional mode through system design tool; D. finishing the simulation of video decoding function on the system design platform; E. depicting the program language through hardware depict language; finishing mode RTL code to do artificial test. The device contains CPU, FPGA, digital video interface and display. The invention is convenient to use and fit for many different applying environments based on transplanting the elementary design on the special integration circuit easily, which shortens the development period of AVS coding and decoding chip greatly.

Description

technical field [0001] The invention relates to the field of information processing, in particular to information source coding and channel coding. Background technique [0002] Digital video and audio codec technology is the key technology of digital broadcasting TV, DVD, multimedia computer and network, broadband network communication industry. China has become a big country in the production and consumption of digital storage media (DSM) products, and will become a big country in the production and consumption of digital television (DTV) in the next step. In June 2002, China established a digital audio and video codec technology standard working group (ie AVS standard working group). AVS standard is the abbreviation of "Audio and Video coding Standard Workgroup of China" (Audio and Video coding Standard Workgroup of China) series standards, including three main standards of system, video, audio and supporting standards such as conformance testing. It is an open standard...

Claims

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Application Information

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IPC IPC(8): G06F11/36G06F17/50H04N7/26H04N19/12H04N19/13H04N19/42H04N19/44H04N19/513H04N19/593
Inventor 雷海军刘鲲
Owner 无锡智科传感网技术股份有限公司
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