A switched capacitor circuit compensation apparatus and method

一种开关电容器、电容器的技术，应用在使用开关电容器的放大器、物理参数补偿/预防、带有半导体器件/放电管的放大器等方向

Active Publication Date: 2007-01-17
TELEFON AB LM ERICSSON (PUBL)
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In practice, because switched capacitor circuits differ from their rating or design parameters, settling errors are almost unavoidable

Method used

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  • A switched capacitor circuit compensation apparatus and method
  • A switched capacitor circuit compensation apparatus and method
  • A switched capacitor circuit compensation apparatus and method

Examples

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Embodiment Construction

[0015] figure 1 Circuit 10 is illustrated, including switched capacitor circuit 12 and associated compensation circuit 14 . Switched capacitor circuit 12 may be configured as part of an integrated circuit (IC) for use in, for example, signal filtering or analog-to-digital conversion. As understood by those skilled in the art, switched capacitor circuit 12 operates in a sampling phase and an integrating phase. During the sampling phase, switch S1 is closed and switch S2 is open, so that the sampling capacitor C S The input signal is sampled, that is, the voltage charged to the input signal. Then, switch S1 is opened and switch S2 is closed, so that the switched capacitor circuit 12 is in its integration phase, in which the output current I from the amplifier 16 OUT transfers the charge from the sampling capacitor C S transferred to the integrating capacitor C I . Amplifier 16 thus operates as a transconductance amplifier that generates an output current in response to a d...

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Abstract

The compensation switched capacitor circuit includes a switched capacitor circuit and a compensation circuit. The compensation circuit generates a reference current that varies under closed loop control to maintain a target slew rate determined by the frequency of the input clock for charging the reference capacitor. The output amplifier of the switched capacitor circuit is configured such that its output current varies proportionally to the reference current. Thus, by configuring the reference capacitor to track the effective capacitance of the switched capacitor circuit, the settling time of the switched capacitor circuit can be made relatively insensitive to the value and variation of the effective capacitance over the clock frequency range. The compensation circuit may include a clock reconditioning circuit that clocks the switched capacitor circuit at a desired duty cycle.

Description

Background of the invention [0001] The present invention relates generally to switched capacitor circuits and, more particularly, to compensating such circuits for process, temperature and power supply variations. [0002] Switched capacitor circuits form the basic building blocks for various circuits, such as delta-sigma (Delta-Sigma) analog-to-digital converters (delta-sigma ADCs) and discrete-time analog filters. However, although their usage varies widely, all of these circuits generally include a core switched capacitor architecture based on those operational transconductance amplifiers (OTAs) configured as integrating amplifiers. A sampling input of the circuit is coupled to a sampling capacitor through a first switch, and the sampling capacitor is coupled to an amplifier input through a second switch. The same input is usually coupled to an integrating amplifier which forms the feedback loop of the amplifier. [0003] During the sampling phase, the first switch is clo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/06H03F3/00H03F1/30H03L7/081
CPCH03F1/30H03M1/0604H03F2200/372H03L7/0812H03F3/005H03L7/0805H03F2200/331H03L7/0816H03M1/06H03L7/08
Inventor N·克莱默
Owner TELEFON AB LM ERICSSON (PUBL)
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