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Polycrystalline silicon layer, method for fabricating the same and flat panel display

一种多晶硅层、非晶硅层的技术，应用在多晶材料生长、化学仪器和方法、半导体/固态器件制造等方向，能够解决晶粒界限分布不规则、晶粒尺寸不均匀、多晶硅层不均匀等问题

Active Publication Date: 2007-06-20
SAMSUNG DISPLAY CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, polysilicon layers crystallized by these methods are not uniform with respect to thin film transistor characteristics such as threshold voltage and cut-off characteristics due to non-uniform grain size and irregular distribution of grain boundaries.

Method used

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  • Polycrystalline silicon layer, method for fabricating the same and flat panel display
  • Polycrystalline silicon layer, method for fabricating the same and flat panel display
  • Polycrystalline silicon layer, method for fabricating the same and flat panel display

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Embodiment Construction

[0028] The present invention will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown.

[0029] 1A to 1F are cross-sectional views of a method of forming a polycrystalline layer according to an exemplary embodiment of the present invention.

[0030] Referring to FIG. 1A, a buffer layer 110 is formed on a transparent insulating substrate such as a glass or plastic substrate.

[0031] The buffer layer 110 functions to prevent moisture and impurities generated on the substrate from diffusing into devices to be formed later, and to adjust a heat conduction rate during crystallization, thereby performing crystallization of the semiconductor layer well.

[0032] In addition, an amorphous silicon layer 120 is formed on the buffer layer 110 by physical vapor deposition (PVD) or chemical vapor deposition (CVD).

[0033] Referring to FIG. 1B , a first pattern layer 130 including a silicon oxide layer...

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Abstract

A polycrystalline silicon layer, a flat panel display using the polycrystalline silicon layer, and methods of fabricating the same are provided. An amorphous silicon layer is formed on a substrate. A first pattern layer, a second pattern layer, and a metal catalyst layer are formed on the amorphous silicon layer. The first pattern layer and the second pattern layer are formed to define a region of at least 400 mum 2 within which a metal catalyst of the metal catalyst layer is diffused into the amorphous silicon layer. A seed region is crystallized by the diffused metal catalyst. After a crystallization region is grown from the seed region, a semiconductor layer is formed on the crystallization region, so as to fabricate a thin film transistor with excellent characteristics. Using this, a flat panel display is fabricated.

Description

technical field [0001] The present invention relates to a polysilicon layer, a flat panel display using the polysilicon layer and a method for manufacturing the polysilicon layer, more specifically, the polysilicon layer involved in the present invention, the flat panel display using the polysilicon layer and the polysilicon layer In the manufacturing method of the polysilicon layer, when the amorphous silicon layer is crystallized into a polysilicon layer, the super grain silicon (Super Grain Silicon, referred to as SGS) crystallization technology is used to crystallize the seed crystal region, and make it have a thickness greater than or equal to 400 μm. 2 area, expand the crystallization of the seed region to become a crystallization region, pattern the crystallization region into a semiconductor layer, and use the semiconductor layer to manufacture a flat panel display. Background technique [0002] Thin film transistors used in flat panel displays such as organic electr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/00H01L29/786H01L27/32H01L21/20H01L21/336H01L21/84C30B29/06
CPCH01L27/1214H01L21/02672H01L21/02532H01L27/1277H05B33/10H05B33/22
Inventor 梁泰勋李基龙徐晋旭朴炳建
Owner SAMSUNG DISPLAY CO LTD