Methods and systems for simulating high-speed link designs

Abstract

Systems and methods for generating a simulation model that simulates a SerDes system comprising components from different SerDes designs are provided. At least one component from the SerDes system comes from a proprietary SerDes design having an existing simulation model for the overall proprietary SerDes design. The existing simulation model includes software codes that inter-mingle the characteristics of the different components of this proprietary SerDes design. Characteristics of at least one SerDes component are extracted and modularized from a proprietary simulator to form a proprietary SerDes component model. Optionally, a standard SerDes component model can also be generated using an existing IBIS-AMI model. A new layer of abstraction is introduced on top of the different SerDes component model types. The simulation system also provides a solver implementation that not only conforms to the strict requirements of the IBIS-AMI specification but also handles the idiosyncrasies of the proprietary model data.

Description

FIELD OF THE INVENTION[0001]The field of the invention is circuit simulation processes.BACKGROUND[0002]The background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.[0003]All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition or use of that term provided herein, the definition or use of that term provided herein applies and the definition or use of that term in the reference does not apply.[0004]As hardware companies continually push the performance of their systems and integrated ...

AI Technical Summary

Benefits of technology

The present invention describes a system and method for simulating a SerDes system using components from different design versions. The system can extract and modularize the characteristics of these components from a proprietary simulator or a standard model, and handle the idiosyncrasies of the data. The invention allows for a more accurate simulation of the SerDes system and the evaluation of different design options.

Problems solved by technology

As hardware companies continually push the performance of their systems and integrated chips (ICs), achieving the required communication bandwidth is becoming increasingly challenging.

This leads to greater signal densities, more package and board layers, more intricate routing topologies, and increased serializer / deserializer (SerDes) tuning complexity.

Furthermore, because system design is a collaborative effort between many teams, a notable challenge in the industry is providing a flexible, unified platform to simulate one part of the system with the components designed by the other groups.

However, existing simulation solutions are suboptimal.

Transient SPICE simulation is too slow and cannot simulate the millions of bits needed to predict link performance.

It is also difficult to incorporate the algorithmic behavior of the transmitter and receiver circuitry, including equalization and clock data recovery.

As data rates have increased and signal integrity through the analog channel continues to degrade rapidly, it is no longer sufficient to evaluate the eye without considering the advanced nonlinear equalization techniques used in today's SerDes modules.

Proprietary simulators are inherently limited due to the focus on their own design technologies.

The downside is that these models are typically not discrete modules that can be readily substituted or exported; rather, the model representations are interwoven throughout the simulation code.

External designs cannot be easily integrated into these simulators, nor can the embedded models be readily ported for use in commercial tools.

Commercial electronic design automation (EDA) tools for link simulation can support IBIS-AMI models, but unfortunately, constructing IBIS-AMI models may require significant development time.

In addition, access to intermediate results and internal model data (such as adaptation behavior) is often limited, since the IBIS-AMI specification only stipulates for the output waveform and clock information to be returned from the model.

The limitations prevent designers from precisely analyzing the behavior of the individual SerDes blocks and consequently reducing designers' capability to correct and improve on the SerDes designs.

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