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Method of manufacturing nonvolatile memory cell

a non-volatile memory and cell technology, applied in the direction of semiconductors, electrical devices, transistors, etc., can solve the problems of delayed rc delay time, low data input/output speed in rom, fast data input/output speed in ram

Inactive Publication Date: 2005-09-15
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a method of manufacturing a nonvolatile memory cell using tungsten for the gate electrode to solve the high temperature annealing problem. The method includes sequentially forming layers on a semiconductor substrate, etching to form a control gate electrode, performing selective oxidization to form a first oxide layer, and forming a first spacer on both sides of the control gate electrode. The method also includes sequentially forming layers on the substrate, etching to form a floating gate electrode, performing source / drain ion implantation process, and forming a second oxide film and a second spacer on both sides of the floating gate electrode and the control gate electrode. The technical effects of the invention include reducing the high temperature annealing problem and improving the performance of the nonvolatile memory cell.

Problems solved by technology

Also, the input / output speed of data in RAM is fast but the input / output speed of data in ROM is low.
Therefore, when the gate electrode is formed of tungsten silicide (WSix), there is a problem that a RC delay time is delayed since the resistance is increased as the memory cell is higher integrated.
However, tungsten (W) is abnormally oxidized since it easily reacts with oxygen at a high temperature.
Therefore, there occurs a problem that an upper surface characteristic of the gate electrode is degraded since tungsten (W) is abnormally oxidized at a high temperature annealing process.
Though the selective oxidation process can prevent abnormal oxidization of tungsten (W), it does not sufficiently oxidize the upper surface of the semiconductor substrate at an edge portion of the tunnel oxide film.
Thus, there is a problem that it does not solve a retention problem of the nonvolatile memory cell.

Method used

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first embodiment

[0029] The major characteristics of the nonvolatile memory cell in the first embodiment lies in that it forms the control gate electrode 8 having. a stack structure of polysilicon 6 and tungsten (W) 7 and forms an oxide layer 12 on the source region 10 and the drain region 11 at an edge portion of the tunnel oxide film 3, in order to prevent a retention problem of the memory cells.

[0030] In order to implement the above characteristics, in the first embodiment, a pattern of the control gate electrode 8 and the floating gate electrode 4a are formed and an ion implantation for the source region 10 and the drain region 11 is then formed before the selective oxidization process that is performed for the entire surface of the semiconductor substrate 1. As a result, abnormal oxidization of tungsten (W) 7 can be prevented and the oxide layer 12 can be formed on the source region 10 and the drain region 11 at the edge portion of the tunnel oxide film 3.

[0031] A method of manufacturing the m...

second embodiment

[0044] The nonvolatile memory cell according to the present invention will be below described.

[0045] A structure of the memory cell according to the second embodiment of the present invention is almost same to the structure of the memory cell shown in FIG. 1. Only difference lies in that the second embodiment performs a first selective oxidization process to form a first oxide layer 30 on the sides of a second polysilicon 26 and a dielectric film 25 both of which are over-etched by blanket etch process, before a floating gate electrode 24a in the memory cell MC is patterned, as shown in FIG. 13.

[0046] Also, the second embodiment of the present invention secures an effective channel length margin of the memory cell by forming the width of the floating gate electrode 24a wider than the width of the control gate electrode 28.

[0047] FIGS. 14˜18 are cross-sectional views for explaining a process of manufacturing of the flash memory cell according to the second embodiment of the present...

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Abstract

The present invention relates to a method of manufacturing a nonvolatile memory cell. The present invention uses tungsten (W) as an upper layer of a control gate electrode in order to integrate the memory cell and performs an ion implantation process for forming a source region and a drain region before a selective oxidization process that is performed to prevent abnormal oxidization of tungsten (W). Therefore, the present invention can reduce a RC delay time of word lines depending on integration of the memory cell and also secure a given distance between a silicon substrate and a tunnel oxide film. As a result, the present invention can solve a data retention problem of the flash memory.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field Of the Invention [0002] The invention relates generally to a method of manufacturing a nonvolatile memory cell, and more particularly to, a method of manufacturing a nonvolatile memory cell capable of enhancing a retention characteristic of the nonvolatile memory using selective oxidation. [0003] 2. Description of the Prior Art [0004] Semiconductor memory device can be classified into RAM (random access memory) products such as DRAM (dynamic random access memory) and SRAM (static random access memory), and ROM (read only memory). RAM is volatile since the data in RAM is lost in time but ROM is nonvolatile since the data in ROM is not lost. Also, the input / output speed of data in RAM is fast but the input / output speed of data in ROM is low. This ROM product family may include ROM, PROM (programmable ROM), EPROM (erasable programmable ROM) and EEPROM (electrically erasable programmable read-only memory). Among them, a demand for EEPROM from ...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/28H01L21/8247H01L21/336H01L27/115H01L29/423H01L29/788H01L29/792
CPCH01L21/28273H01L29/66825H01L29/6656H01L29/42324H01L29/40114H10B99/00
Inventor KIM, JUM SOOJUNG, SUNG MUNLEE, SANG BURNCHO, MIN KUCKLEE, YOUNG BOK
Owner SK HYNIX INC