Method of manufacturing nonvolatile memory cell
a non-volatile memory and cell technology, applied in the direction of semiconductors, electrical devices, transistors, etc., can solve the problems of delayed rc delay time, low data input/output speed in rom, fast data input/output speed in ram
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first embodiment
[0029] The major characteristics of the nonvolatile memory cell in the first embodiment lies in that it forms the control gate electrode 8 having. a stack structure of polysilicon 6 and tungsten (W) 7 and forms an oxide layer 12 on the source region 10 and the drain region 11 at an edge portion of the tunnel oxide film 3, in order to prevent a retention problem of the memory cells.
[0030] In order to implement the above characteristics, in the first embodiment, a pattern of the control gate electrode 8 and the floating gate electrode 4a are formed and an ion implantation for the source region 10 and the drain region 11 is then formed before the selective oxidization process that is performed for the entire surface of the semiconductor substrate 1. As a result, abnormal oxidization of tungsten (W) 7 can be prevented and the oxide layer 12 can be formed on the source region 10 and the drain region 11 at the edge portion of the tunnel oxide film 3.
[0031] A method of manufacturing the m...
second embodiment
[0044] The nonvolatile memory cell according to the present invention will be below described.
[0045] A structure of the memory cell according to the second embodiment of the present invention is almost same to the structure of the memory cell shown in FIG. 1. Only difference lies in that the second embodiment performs a first selective oxidization process to form a first oxide layer 30 on the sides of a second polysilicon 26 and a dielectric film 25 both of which are over-etched by blanket etch process, before a floating gate electrode 24a in the memory cell MC is patterned, as shown in FIG. 13.
[0046] Also, the second embodiment of the present invention secures an effective channel length margin of the memory cell by forming the width of the floating gate electrode 24a wider than the width of the control gate electrode 28.
[0047] FIGS. 14˜18 are cross-sectional views for explaining a process of manufacturing of the flash memory cell according to the second embodiment of the present...
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