Semiconductor device and manufacturing metthod thereof

Abstract

A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

Description

[0001] This application is the first of two concurrently filed Divisional Applications of U.S. application Ser. No. 10 / 374,997, filed Feb. 28, 2003, which, in turn, is a CIP (Continuation-In-Part) of (i) U.S. application Ser. No. 09 / 768,288, filed Jan. 25, 2001, and now abandoned, of (ii) U.S. application Ser. No. 09 / 771,985, filed Jan. 30, 2001, and now abandoned, and of (iii) U.S. application Ser. No. 09 / 983,286, filed Oct. 23, 2001, and now U.S. Pat. No. 6,639,323, said U.S. application Ser. Nos. 09 / 768,288 and 09 / 771,985 are, in turn, a continuation application and a divisional application, respectively, of U.S. application Ser. No. 09 / 449,834, filed Nov. 26, 1999, and now U.S. Pat. No. 6,342,726, which, in turn, was filed as a continuation of U.S. application Ser. No. 08 / 822,933, filed Mar. 21, 1997, and now abandoned, and said U.S. application Ser. No. 09 / 983,286, is a continuation of U.S. application Ser. No. 09 / 113,500, filed Jul. 10, 1998, and now U.S. Pat. No. 6,307,269; a...

AI Technical Summary

Benefits of technology

[0011] In view of the above, an object of the present invention is to provide a semiconductor integrated circuit device capable of mounting an elastic structural material to a wiring substrate stably with a high accuracy and making the bonding step of a semiconductor chip stable, thereby enabling assembling with a high yield.

[0059] As the substrate protruding parts are not separate from the substrate body but are formed together with it in a one-piece construction, the substrate protruding parts need not be formed from costly materials. As a result, the cost of manufacturing the semiconductor device is reduced.

Problems solved by technology

For example, since the flexible wiring substrate in the package structure described above has a structure typically represented by a TCP (Tape Carrier Package) in which a Cu wiring pattern is formed on the surface of a polyimide tape, and an elastomer is formed to the wiring substrate on the side of the wiring surface, it is difficult to mount the elastomer uniformly and stably because of unevenness of the wiring pattern on the flexible wiring substrate.

That is, there exist such problems that voids not filled with the elastomer are formed near both sides of the protrusions of the wiring pattern upon coating or appending the elastomer on the flexible wiring substrate, and the step of bonding the semiconductor chip can not be conducted stably since the size and the shape of the elastomer are not stable.

Accordingly, there is a concern that an increase in the number of pins of the package may be restricted.

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