Leakage current control device of semiconductor memory device

Abstract

A leakage current control device of a semiconductor memory device is provided to effectively remove leakage current flowing from a bit line to a word line when a process defect is generated by gate residues of the semiconductor memory device, thereby reducing unnecessary current consumption. In the leakage current control device, the bit line boosted to a voltage level of core voltage / 2 is controlled at a ground voltage level during a precharge period to remove unnecessary leakage current flowing from the bit line to a word line bridge.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention generally relates to a leakage current control device of a semiconductor memory device, and more specifically, to a technology of effectively removing leakage current when a process defect is generated by gate residues. [0003] 2. Description of the Related Art [0004] Generally, in most of DRAM plannar processes using semiconductors a process defect caused by gate residues results in a bridge phenomenon which shorts neighboring metals. [0005] Due to the bridge phenomenon between metals, an unnecessary current path is formed to increase power consumption of a memory, which degrades the performance of the product. [0006]FIGS. 1 and 2 are diagrams illustrating a path of leakage current by the gate residue process defect in a conventional semiconductor memory device. [0007] In the conventional semiconductor memory device, a word line WL and a bit line BL are connected to a resistor R and a capacitor...

AI Technical Summary

Benefits of technology

[0010] Various embodiments of the present invention are directed at controlling a pair of bit lines, which are boosted to a voltage level of core voltage / 2 during a precharge or standby period, at a ground voltage level to remove unnecessary leakage current flowing into a word line.

Problems solved by technology

Generally, in most of DRAM plannar processes using semiconductors a process defect caused by gate residues results in a bridge phenomenon which shorts neighboring metals.

Due to the bridge phenomenon between metals, an unnecessary current path is formed to increase power consumption of a memory, which degrades the performance of the product.

However, when the above-described state is maintained for a long time, a current path is formed from the bit line BL to the word line WL, so that unnecessary current is consumed.

Moreover, it is difficult to solve the process defect by complementation on the process as a critical dimension of the semiconductor memory becomes more microscopic.

However, when leakage current is generated by a gate residue phenomenon at the standby mode of the low power consumption memory product, unnecessary current is consumed.

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