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Ball grid array IC substrate with over voltage protection function

a technology of over voltage protection and ic substrate, which is applied in the direction of thin film varistors, varistors, electrical devices, etc., can solve the problems of high design cost, limited space, and inability to recover damage to the ic devi

Inactive Publication Date: 2006-06-29
INPAQ TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

"The present invention provides an IC substrate with over voltage protection functions and a method for manufacturing the same. The substrate has a grounding conductor layer on its lower surface, which is connected to variable resistance material layers and electrode terminals. The substrate can be designed by various IC packaging methods and the protection circuits can be installed after packaging. The technical effects of the invention include providing protection against surge pulses, saving space and reducing costs, and reducing design costs and space requirements."

Problems solved by technology

Because such structure cannot provide over voltage protection functions, the IC device cannot withstand the energy of surge pulses, which result in an irrecoverable damage to the IC device.
Therefore, such design has the disadvantages of high design costs, wasting limited space, and providing incomplete protection for the IC device.

Method used

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  • Ball grid array IC substrate with over voltage protection function
  • Ball grid array IC substrate with over voltage protection function
  • Ball grid array IC substrate with over voltage protection function

Examples

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Embodiment Construction

[0026] The embodiments of the present invention are described with reference to the drawings. The same elements in the drawings have the same reference numerals.

[0027]FIGS. 2a, 2b and 2c are sectional views of an IC substrate formed with over voltage protection functions according to an embodiment of the present invention. As shown in FIG. 2a, a first conductor layer is formed to be a grounding conductor layer (23) on a substrate (22). The first conductor layer is formed on a lower surface of the substrate and extends through the substrate to its upper surface. One or more terminals are formed on the upper surface of the substrate. As shown in FIG. 2b, one or more variable resistance material layers (24) are formed to overlay the terminals of the grounding conductor layer (23) so as to form connection with each of the variable resistance material layers. In addition, a plurality of second conductor layers (21) are formed to be upper electrodes. The second conductor layers overlay o...

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Abstract

The present invention relates to an IC substrate provided with over voltage protection functions and thus, a plurality of over voltage protection devices are provided on a single substrate to protect an IC chip directly. According to the present invention, there is no need to install protection devices at respective I / O ports on a printed circuit board to prevent the IC devices from damage by surge pulses. Therefore, the costs to design circuits are reduced, the limited space is efficiently utilized, and unit costs to install respective protection devices are lowered down.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This application is a divisional of U.S. Non-Provisional application Ser. No. 10 / 463,984, filed Jun. 18, 2003, the entire contents of which are incorporated herein by reference.FIELD OF THE INVENTION [0002] The present invention relates to an IC substrate with over voltage protection functions, more particularly, to an IC substrate provided with a structure having multiple over voltage protection devices. BACKGROUND OF THE INVENTION [0003] A conventional over voltage protection device is installed near I / O ports on a printed circuit board to protect internal IC devices according to demands by each IC device. However, such design requires installing independent over voltage protection devices in accordance with requirements of respective circuits to prevent respective IC devices from being damaged by surge pulses. [0004] Please refer to FIG. 1a, which is a top view of an IC device disposed on a conventional substrate. In FIG. 1a, there ar...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L23/552H01L23/12H01C7/10H01C7/12H01L21/48H01L23/52H01L23/62
CPCH01C7/1013H01L2224/16235H01L21/4857H01L21/486H01L23/057H01L23/49816H01L23/49822H01L23/49827H01L23/50H01L23/62H01L24/10H01L24/48H01L2224/05599H01L2224/16H01L2224/48091H01L2224/48247H01L2224/4826H01L2224/48472H01L2224/85399H01L2924/01079H01L2924/014H01L2924/14H01L2924/15311H01L2924/19105H01L2924/19106H01C7/12H01L2224/0401H01L2924/01033H01L2924/01006H01L2924/01005H01L2924/00014H01L2224/45099H01L2924/00H01L2924/15787H01L2924/12042H01L23/12
Inventor LEE, CHUN-YUAN
Owner INPAQ TECH
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