Semiconductor device and manufacturing method thereof

a technology of semiconductor devices and semiconductors, applied in semiconductor devices, capacitors, electrical devices, etc., can solve the problems of contact failure, inability to prevent the reaction between platinum and aluminum, superior tin film formed within the deep contact hole described above,

Inactive Publication Date: 2007-08-09
FUJITSU MICROELECTRONICS LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0010] It is an object of the present invention to provide a semiconductor device in which connection between a wire and an electrode of a ferroelectric capacitor is superior, and a manufacturing method thereof.

Problems solved by technology

However, conventionally the coverage of the TiN film formed within the deep contact hole described above is not superior, and in some cases the film cannot prevent reaction between platinum and aluminum from occurring.
Consequently, contact failure arises or large upward rising occurs, both of which may affect the upper wiring in some cases.

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

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Embodiment Construction

[0017] Hereinafter, preferred embodiments of the present invention are specifically explained with reference to attached drawings. FIG. 1 is a circuit diagram showing a configuration of a memory cell array of a ferroelectric memory (semiconductor device) according to an embodiment of the present invention.

[0018] This memory cell array is provided with a plurality of bit lines 103 extending in a direction, a plurality of word lines 104 and plate lines 105 both extending in a direction vertical to the direction in which the bit lines 103 extend. Further, in a manner consistent with grids defined by the bid lines 103, word lines 104, and plate lines 105, a plurality of memory cells of the ferroelectric memory according to the present embodiment are arranged in array. Each memory cell is provided with a ferroelectric capacitor 101 and a MOS transistor 102.

[0019] A gate of the MOS transistor 102 is connected to the word line 104. Further, one source / drain of the MOS transistor 102 is c...

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Abstract

An interlayer insulating film covering a ferroelectric capacitor is formed, and through the interlayer insulating film, contact holes each reaching a capacitor electrode are formed. A wiring connected to the capacitor electrode through the contact hole is further formed above the interlayer insulating film. A planar shape of the contact hole is a regular octagon, a regular rectangle with four angles thereof being rounded, an octagon with a length of each neighboring side thereof being different to each other, a circle, and so forth.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2003-348610, filed on Oct. 7, 2003, the entire contents of which are incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a semiconductor device suitable for a ferroelectric memory, and a manufacturing method thereof. [0004] 2. Description of the Related Art [0005] For a semiconductor device having a ferroelectric capacitor, an annealing treatment in the oxygen atmosphere after forming a capacitor film is dispensable so that characteristics of a ferroelectric film are enhanced. Accordingly, materials not easily oxidizable are used as materials for capacitor electrodes to sandwich the ferroelectric film, or materials oxidizable but securing sufficient conductivity even after being oxidized used as the materials. Metals of the platinum family such...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L21/338H01L21/02H01L21/311H01L27/105H01L21/768H01L21/8246H01L27/115H01L27/11504H01L27/11507
CPCH01L21/31116H01L21/76802H01L28/40H01L27/11502H01L27/11507H01L21/76895H10B53/30H10B53/00
InventorMIURA, JIROUFUJIKI, MITSUSHIDOTE, AKITAKAMATSU, TOMOHIRO
OwnerFUJITSU MICROELECTRONICS LTD