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Trench capacitor and fabrication method thereof

a technology of clamp capacitor and clamping plate, which is applied in the direction of diodes, semiconductor devices, electrical apparatus, etc., can solve the problems of affecting process reliability and yield, device dimensions are required to shrink, and leakage currents

Inactive Publication Date: 2007-09-27
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0011] Accordingly, the present invention is directed to a method of fabricating a trench capacitor. According to this method, the surface damage of the capacitor dielectric layer, which causes leakage currents and affects process reliability and yields, can be avoided.
[0012] The present invention also is directed to a trench capacitor. In the trench capacitor, the surface of the capacitor dielectric layer is protected without being subject to damage. As a result, process reliability and yields are improved.
[0025] According to the present invention, a portion of the mask layer is removed so that the mask layer is pulled back and a portion of the substrate at two sides of the top of the trench is exposed. Accordingly, the subsequent top electrode is formed on the exposed substrate at two sides of the top of the trench. During the subsequent doping process and etch process, the top electrode protects the surface of the capacitor dielectric layer from damage. In other words, the prior art surface damage of the capacitor dielectric layer, which causes leakage currents and affects process reliability and yields, can be avoided.

Problems solved by technology

Due to minimization of devices, device dimensions are required shrinkage.
That causes leakage currents and affects the process reliability and yields.
In the subsequent processes, such as the doping process and the etch process to define the active area and form the device, the surface of the ONO layer 112 of the trench capacitor is subject to damage as well.
However, the patents can be more complicated for the process, and can't effectively solve the above-mentioned question.

Method used

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Embodiment Construction

[0029]FIGS. 2A-2H are cross sectional views showing progress of a method of fabricating a memory according to an embodiment of the present invention.

[0030] Referring to FIG. 2A, a substrate 200 is provided. A mask layer 201 is formed over the substrate 200. The mask layer 201 comprises, for example, a pad oxide layer 202 and a silicon nitride layer 204, which are sequentially formed over the substrate 200. The method of forming the pad oxide layer 202 can be, for example, a thermal oxidation method. The method of forming the silicon nitride layer 204 can be, for example, a chemical vapor deposition (CVD) method. Then, the pad oxide layer 202 and the silicon nitride 204 are patterned, and the substrate 200 is etched to form a plurality of trenches 206 in the substrate 200.

[0031] Referring to FIG. 2B, a bottom electrode 208 is formed in the substrate 200 of the surfaces of the trenches 206. In the method of forming the bottom electrode 208, a doped silicon oxide layer is first forme...

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Abstract

A method of fabricating trench capacitors is provided. A plurality of trenches is formed in the substrate by performing a patterning process with a patterned mask layer on a substrate. A bottom electrode is formed in the substrate of the surface of the trench. A portion of the patterned mask layer is removed so as to expose a portion of the substrate at two sides of the top of the trench. A capacitor dielectric layer is formed on the substrate and the surface of the trench. A conductive layer is formed over the substrate. The conductive layer is at least filled into the trench and covers the capacitor dielectric layer. The patterned mask layer and a portion of the conductive layer are removed and the portion of the conductive layer which covers the capacitor dielectric layer is reserved as to form a top electrode.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a memory capacitor and a fabrication method thereof, and more particularly, to a trench capacitor and a fabrication method thereof. [0003] 2. Description of the Related Art [0004] Due to minimization of devices, device dimensions are required shrinkage. For memory devices with capacitors, areas for fabrication of capacitors also are continuously reduced. A trench capacitor memory device is a device with a capacitor formed in the substrate that it solves the issue of device minimization. [0005] The prior art method of fabricating a trench capacitor is shown in FIG. 1A. Referring to FIG. 1A, a silicon oxide layer 102 and a silicon nitride layer 104 are sequentially formed over a substrate 100. Then, an etch process is performed to remove portions of the silicon oxide layer 102 and the silicon nitride layer 104 to form openings 106 which expose the surface of the substrate 100. [0006] R...

Claims

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Application Information

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IPC IPC(8): H01L29/94
CPCH01L27/0629H01L29/945H01L27/1087H10B12/0387
Inventor LEE, RICHARD
Owner UNITED MICROELECTRONICS CORP