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Circular Test Pads on Scribe Street Area

a technology of test pads and scribe streets, which is applied in the direction of individual semiconductor device testing, semiconductor/solid-state device testing/measurement, instruments, etc., can solve the problems of increasing problems, reducing the overall yield of dies which can be fabricated from wafers, and damaged circuitry, so as to reduce reliability risks, increase wafer yield, and reduce yield loss at the wafer saw

Inactive Publication Date: 2007-10-18
TEXAS INSTR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention is a new design for wafers and a process for making them. The design includes circular test pads that have a curved profile, preferably a round periphery. This design prevents cracks from forming in the test pads and spreading into the active circuitry of the die, which increases the yield of wafers. The process for making these wafers is simple and does not require any major changes in the manufacturing process. The invention also reduces yield loss and reliability risks associated with cracks in the wafer.

Problems solved by technology

Accordingly, even slight propagation of cracks in the scribe street formed during the wafer saw process eventually results in damaged circuitry since the design of conventional test pads does not prevent them from extending into the active circuitry area 12, as depicted in FIG. 2.
These cracks render the particular die 12 non-functional, thus reducing the overall yield of the die which can be fabricated from the wafers.
However, with the continued reduction in scribe street widths with the introduction of new technologies, and in an effort to maximize wafer yield, these cracks are becoming an increasing problem and a reduction in wafer yield.

Method used

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  • Circular Test Pads on Scribe Street Area
  • Circular Test Pads on Scribe Street Area

Examples

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Embodiment Construction

[0018] Referring now to FIG. 4, there is depicted at 30 a semiconductor wafer having a plurality of active circuits 32 (die) being formed upon the semiconductor wafer according to conventional semiconductor wafer fab processing. Defined in two dimensions between each of the formed die 32 are elongated scribe streets, generally shown at 34. Scribe streets 34 provide physical and electrical separation between the die 32, and are later cut using a wafer saw process to separate the active die for subsequent packaging.

[0019] Advantageously, as shown in FIG. 4, a plurality of test pads 36 are provided in the scribe street area 34 which have the curved profile, preferably shown as having a round periphery, as shown, but which could have other curved peripheries, such as oval or elliptical. Each of these test pads is electrically connected to one or more of the adjacent die 32, and provide a suitable electrical connection point for test equipment (not shown) to electrically test and operat...

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Abstract

A semiconductor wafer design and process having test pads (36) reducing cracks generated during the wafer saw process from extending into and damaging adjacent die. The present invention provides a plurality of circular test pads (36) in a wafer scribe street (34) such that any cracks generated in the test pad during wafer saw self terminate in the periphery of the circular test pad. By providing a curved test pad periphery, cracks will tend to propagate along the edges of the test pads and self terminate therein. The circular test pads avoid any sharp corners as is conventional in rectangular test pads which tend to facilitate the extension of cracks from corners to extend into the adjacent wafer die (32). The present invention utilizes existing semiconductor fab processing and utilizes new reticle sets to define the curved test pads.

Description

[0001] This application is a divisional of co-pending application Ser. No. 10 / 145,442 filed May 14, 2002, the contents of which are herein incorporated by reference in its entirety.FIELD OF THE INVENTION [0002] The present invention is generally related to semiconductor wafer processing, and more particularly to scribe streets extending between formed active areas and test pads located thereon for testing the active devices. BACKGROUND OF THE INVENTION [0003] Integrated circuits are typically defined on a semiconductor wafer using a variety of wafer fab processes. Each of the formed active circuit areas, later forming integrated circuits after dicing and packaging, are physically separated from one another on the wafer by an elongated region commonly referred to as a scribe street. These wafers are typically cut along the scribe street after circuit testing using a conventional saw process. [0004] In addition to the active circuitry formed on the semiconductor wafer, test pads are a...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/66H01L23/58
CPCH01L22/32
Inventor ROLDA, RUBEN A. JR.VALERIO, RICHARDOLERO, JENNY
Owner TEXAS INSTR INC
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