Processor and compiler for decoding an instruction and executing the instruction with conditional execution flags
Patent Information
- Authority / Receiving Office
- US · United States
- Patent Type
- Applications(United States)
- Current Assignee / Owner
- OKABAYASHI HAZUKI
- Publication Date
- 2008-08-28
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
Description
[0001] This is a Rule 1.53(b) Divisional of Ser. No. 10 / 805,381, filed Mar. 22, 2004BACKGROUND OF THE INVENTION
[0002] (1) Field of the Invention
[0003] The present invention relates to a processor such as a DSP (Digital Signal Processor) and a CPU (Central Processing Unit), as well as to a compiler that generates instructions executed by such a processor. More particularly, the present invention relates to a processor and a compiler which are suitable for performing signal processing for sounds, images and others.
[0004] (2) Description of the Related Art
[0005] With the development in multimedia technologies, processors are increasingly required to be capable of high-speed media processing represented by sound and image signal processing. As existing processors responding to such requirement, there exist Pentium® / Pentium® III / Pentium 4® MMX / SSE / SSE2 and others produced by the Intel Corporation of the United States supporting SIMD (Single Instruction Multiple Data) instructions. Of these pr...