Micro-phase adjusting and micro-phase adjusting mixer circuits designed with standard field effect transistor structures
Inactive Publication Date: 2009-02-05
GLOBALFOUNDRIES INC
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Benefits of technology
[0012]The phase difference between the first and second signals is based in part on which propagation FET is selected (i.e., which input diffusion region is selectively biased) relative to the originating point of the first signal. That is, the greater the electrical distance (i.e., delay due to built-in resistance and capacitance) between the selected propagation FET and the input node, the greater the propagation delay and, thus, the greater the phase adjustment. Contrarily, the closer the electrical distance between the selected propagation FET and the input node, the smaller the phase adjustment will be.
Problems solved by technology
Today, phase synchronization is typically accomplished using a phase rotator designed to mix several phase-related signals to create a selectable phase offset However, while adequate for current clock speeds and de-serialization usage, these phase rotators are large, expensive, complex and have limited frequency / granularity.
Furthermore, current logic designs often require delay of clock or data signals in order to correct for timing (setup or hold) violations in various logic paths.
However, because analog functions (e.g., phase rotators and delayed locked loops (DLLs)) are expensive to implement, phase adjusting circuits that incorporate fixed delay cells are typically used.
That is, the greater the electrical distance (i.e., delay due to built-in resistance and capacitance) between the selected propagation FET and the input node, the greater the propagation delay and, thus, the greater the phase adjustment.
Method used
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[0032]The embodiments of the invention and the various features and advantageous details thereof are explained more fully with reference to the non-limiting embodiments that are illustrated in the accompanying drawings and detailed in the following description. It should be noted that the features illustrated in the drawings are not necessarily drawn to scale. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments of the invention. The examples used herein are intended merely to facilitate an understanding of ways in which the embodiments of the invention may be practiced and to further enable those of skill in the art to practice the embodiments of the invention. Accordingly, the examples should not be construed as limiting the scope of the embodiments of the invention.
[0033]As mentioned above, with recent advances in semiconductor technology, integration levels have increased to the point where the functional ...
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Disclosed herein are embodiments of a programmable phase adjusting circuit, a programmable phase adjusting mixer circuit and design structures for these circuits. These circuits comprise a variable delay device connected between input and output nodes. The device includes multiple FETs with input diffusion regions that are connected to a voltage rail via switches so that they can be selectively biased, gates that are connected in series to the input node so that a periodic input signal can be propagated sequentially through each of the gates and output diffusion regions that are connected in parallel to the output node. A current source is connected between the output node and another voltage rail for biasing the output node when the variable delay device is off. The variable delay device enables a circuit in which small increments of selectable phase adjustments can be made to the periodic input signal as a function of propagation delay.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is related to the following co-pending application filed concurrently herewith by the same Applicants and assigned to the same Assignee, namely, International Business Machines Corporation (IBM Corporation): “Multiple-Source-Single Drain Field Effect Semiconductor Device And Circuit”, Attorney Docket No. BUR920070059US1. The complete disclosure of this co-pending application is incorporated herein by reference.BACKGROUND[0002]1. Field of the Invention[0003]The embodiments of the invention generally relate to phase adjusting and phase adjusting mixer circuits and, more particularly, to phase adjusting and phase adjusting mixer circuits that incorporate a variable delay device having multiple individually selectable field effect transistors (FETs) for selectively programming delay. The embodiments of the invention further relate to design structures embodied in a machine readable medium for designing and manufacturing such ...
Claims
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Login to View More IPC IPC(8): H03L7/00G06F17/50
CPCH03K5/06H03K2005/00058H03K2005/00052
InventorABADEER, WAGDI W.BONACCIO, ANTHONY R.IADANZA, JOSEPH A.
OwnerGLOBALFOUNDRIES INC