Multiplier device with suppression of higher-order distortion

Abstract

A multiplier device is configured to include first to nth multipliers M1 to Mn for multiplying a carrier modulated information signal with first to nth mutually phase shifted and identical, substantially square wave mixing signals MS1 to MSn with 50% duty cycle. In order to eliminate fifth or higher order interferences from the output of the multiplier device according to the invention, n is greater than 2, outputs of the multipliers M1 to Mn are respectively coupled through weighting circuits W1 to Wn with respective fixed weighting factors WF1 to WFn to an adder circuit, the mixing signals MS1 to MSn having respective phase angles φi corresponding to φi=i*Δφ, the weighting factors WFi corresponding to the sine value of the respective phase angles φi=i*Δφ with Δφ being the mutual phase difference between each two phase consecutive mixing signals corresponding to π / (n+1) and i varying from 1 to n.

Description

[0001]This application is a continuation of U.S. patent application Ser. No. 10 / 581,659, filed 31 May 2006, and claims the benefit of PCT / EP2004 / 013742, filed 1 Dec. 2004 and EP 03078812, filed 5 Dec. 2003.BACKGROUND AND SUMMARY OF THE INVENTION[0002]The invention relates to a multiplier device comprising first to nth multipliers M1 to Mn for multiplying a carrier modulated information signal with first to nth mutually phase shifted and identical, substantially square wave mixing signals MS1 to MSn with 50% duty cycle. Such multiplier devices are frequently used in receivers for converting an RF antenna input signal with an RF carrier frequency fRF into an intermediate frequency (IF) signal with an IF carrier frequency fIF and / or for demodulating an (IF) carrier modulated information signal with carrier frequency fc into baseband, or as used in stereo decoder circuits for decoding and / or demultiplexing a stereo multiplex signal into left and right baseband stereo signals.[0003]A ste...

AI Technical Summary

Benefits of technology

[0007]It is an object of the present invention to provide a robust, low cost multiplier device allowing for an effective suppression of all undesired higher order interferences, which is very well suitable for use in receivers for converting an RF antenna input signal into an IF signal.

[0008]Another object of the invention is to allow for a robust and low cost implementation.

[0011]By applying the above measure according to the invention, the mutually identical 50% duty cycle waveform of the n mixing signals are chosen to be substantially rectangular, allowing for a multiple use of mutually identical cost effective non-linear multipliers, logic and other circuitry and adequate operation at high frequencies. The multiplication gains are being provided for with the weighting circuits W1 to Wn allowing for the use of mutually identical multipliers with mutually identical gain, which are easy to implement.

[0014]A robust and accurate implementation of an embodiment of a multiplier device according to the invention is characterized by a local oscillator circuit supplying an oscillator signal with frequency fo to a serial arrangement of first to nth phase shifting means, each providing a fixed phase shift of Δφ and supplying respectively mixing signals MS1 to MSn to the first to nth multipliers M1 to Mn.

Problems solved by technology

However, due to the ongoing demand for higher performance / price ratio the suppression of third order interferences as provided for in the above known multiplier device does not suffice anymore.

At frequencies increasing above the 38 kHz stereo difference signal (L−R) subcarrier frequency the waveform will be deteriorated by increasing non-linearities, making this known interference suppression unsuitable for receiver applications.

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