Integrated Circuit with a Laterally Diffused Metal Oxide Semiconductor Device and Method of Forming the Same

a semiconductor device and metal oxide technology, applied in the field of integrated circuits, can solve the problems of conflicting design requirements, limited progress in the introduction of low-cost integrated circuits, and the presence of higher-voltage devices, and achieve the effect of reducing the area and reducing the area

Active Publication Date: 2010-03-04
TAHOE RES LTD
View PDF92 Cites 71 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0016]These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by advantageous embodiments of the present invention, which includes an integrated circuit formed on a semiconductor substrate and configured to accommodate higher voltage devices and low voltage devices therein. In one embodiment, the integrated circuit includes a transistor advantageously embodied in a laterally diffused metal oxide semiconductor (“LDMOS”) device having a gate located over a channel region recessed into a semiconductor substrate. The transistor also includes a source/drain including a lightly or heavily doped region adjacent the channel region, and an oppositely doped well extending under the channel region a...

Problems solved by technology

An objective of incorporating control and signal processing devices on a semiconductor substrate with the higher voltage devices often encounters conflicting design requirements.
Since the cost of an integrated circuit is roughly proportional to the number of processing steps to construct the same, there has been limited progress in the introduction of low cost integrated circuits that include both control and signal processing devices and higher voltage devices such as the switches of the power train of a power converter.
Inasmuch as the cost of a die that incorporates the integrated circuit is roughly proportional to the area thereof, the presence of the higher voltage devices conflicts with the reduction in area achieved by incorporating the fine line features in the control and signal processing devices.
While a design and implementation of low voltage devices such as logic devices that form portions of a microprocessor have been readily incorporated into integrated circuits,...

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Integrated Circuit with a Laterally Diffused Metal Oxide Semiconductor Device and Method of Forming the Same
  • Integrated Circuit with a Laterally Diffused Metal Oxide Semiconductor Device and Method of Forming the Same
  • Integrated Circuit with a Laterally Diffused Metal Oxide Semiconductor Device and Method of Forming the Same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028]The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.

[0029]The present invention will be described with respect to preferred embodiments in a specific context, namely, an integrated circuit including a transistor [e.g., embodied in a laterally diffused metal oxide semiconductor (“LDMOS”) device] and methods of forming the same. While the principles of the present invention will be described in the environment of a power converter, any application that may benefit from a transistor that can accommodate higher voltages and is integrable with a low voltage device [e.g., complementary metal oxide semiconductor (“CMOS”) device] on a...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped region adjacent the channel region, and an oppositely doped well extending under the channel region and a portion of the lightly or heavily doped region of the source/drain. The transistor also includes a channel extension, within the oppositely doped well, under the channel region and extending under a portion of the lightly or heavily doped region of the source/drain.

Description

[0001]This application is a continuation in part of, and claims priority to, U.S. patent application Ser. No. 11 / 805,233, entitled “Laterally Diffused Metal Oxide Semiconductor Device and Method of Forming the Same,” filed on May 22, 2007, which is a divisional of U.S. patent application Ser. No. 10 / 767,684, entitled “Laterally Diffused Metal Oxide Semiconductor Device and Method of Forming the Same,” filed on Jan. 29, 2004, now, U.S. Pat. No. 7,230,302, issued Jun. 12, 2007, all of which are incorporated herein by reference.TECHNICAL FIELD[0002]The present invention is directed, in general, to integrated circuits and, more specifically, to an integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same.BACKGROUND[0003]The design of early integrated circuits focused on implementing an increasing number of small semiconductor devices on a semiconductor substrate to achieve substantial improvements in manufacturing efficiency and cost, p...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L29/78
CPCH01L21/28518H01L21/761H01L21/823814H01L21/823878H01L21/823892H01L2224/13H01L29/665H01L29/7816H01L2924/13091H01L27/0922H01L2924/00H01L29/7835
Inventor LOTFI, ASHRAF W.TROUTMAN, WILLIAM W.LOPATA, DOUGLAS DEANNIGAM, TANYA
Owner TAHOE RES LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products