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Method for increasing breaking down voltage of lateral diffused metal oxide semiconductor transistor

a metal oxide semiconductor and lateral diffusion technology, applied in the field of semiconductor process, can solve problems such as increasing device size, and achieve the effect of increasing breaking down voltage and increasing breaking down voltag

Active Publication Date: 2010-10-28
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach effectively increases breakdown voltage and reduces device size by isolating weak points in the n-type well region, improving voltage resistance and device integrity while allowing for further miniaturization without additional processing costs.

Problems solved by technology

The two methods, however, increase device size, which is contrary to miniaturization trends.

Method used

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  • Method for increasing breaking down voltage of lateral diffused metal oxide semiconductor transistor
  • Method for increasing breaking down voltage of lateral diffused metal oxide semiconductor transistor
  • Method for increasing breaking down voltage of lateral diffused metal oxide semiconductor transistor

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Embodiment Construction

[0020]The following descriptions are of the contemplated mode of carrying out the invention. The descriptions are made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense.

[0021]An asymmetric lateral diffused metal oxide semiconductor transistor (LDMOS) is illustrated in accordance with FIGS. 2A and 2B, in which a deep trench isolation (DTI) structure is used to isolate elements in a device. FIG. 2A shows a plane view of a lateral diffused metal oxide semiconductor transistor. FIG. 2B shows a cross section along lines I-I′ of FIG. 2A. As shown in FIGS. 2A and 2B, a p-type epitaxy layer 204 is disposed on a p-type substrate 202. The p-type substrate 202 includes a p-type bulk 206 thereon and an n-type well 214 is formed in the p-well bulk 206. A plurality of field oxide layers (FOX) 216 are formed on the p-type bulk 206 and the n-type well region 214. A gate structure 222 including a gate electrode 218 and a gate dielectr...

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Abstract

A lateral diffused metal oxide semiconductor transistor is disclosed. A p-type bulk is disposed on a substrate. An n-type well region is disposed in the p-type bulk. A plurality of field oxide layers are disposed on the p-type bulk and the n-type well region. A gate structure is disposed on a portion of the p-type bulk and one of the plurality of field oxide layers. At least one deep trench isolation structure is disposed in the p-type bulk and adjacent to the n-type well region.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The invention relates to a semiconductor process, and more particularly related to a lateral diffused metal oxide semiconductor transistor (LDMOS).[0003]2. Description of the Related Art[0004]Power semiconductor devices are currently in wide use in many electronic products and the most common devices for high voltage integrated circuits are lateral diffused metal oxide semiconductor transistors (LDMOS). The LDMOS has advantages of specific on resistance and breakdown voltage and is capable of being integrated by a VLSI process.[0005]Referring to FIG. 1, which shows a cross section of a conventional lateral diffused MOS transistor, a p-typed epitaxy layer 104 (also referred to as a p well) is disposed on a p-type silicon substrate 102, and an n well 106 is disposed in the p-type epitaxy layer 104. A plurality of field oxide layers (FOX) 108 are partially disposed on the p-typed epitaxy layer 104 and the n well 106. A gat...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/78H01L21/762
CPCH01L21/76224H01L29/0692H01L29/7835H01L29/42368H01L29/0847H01L29/0878
Inventor LIN, KWANG-MINGPU, SHIH-CHIEHCHEN, SHIH-CHAN
Owner VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION