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Method of implementing memristor-based multilevel memory using reference resistor array

a multi-level memory and reference resistor technology, applied in the field of memristors, can solve the problems of difficult to determine the proper pulse width for difficulty in achieving the desired resistance value, and several weaknesses of the memristor, so as to prevent the resistance of the memristor

Inactive Publication Date: 2011-07-28
IND COOP FOUND CHONBUK NAT UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a method for implementing memristor-based multilevel memories using a reference resistor array. The method involves preparing a reference resistor array by connecting a plurality of resistors in series or forming tabs in middle of a resistant line so that a resistance value of a memristor is equal to the closest reference resistance value in the reference resistor array. The resistance value of the memristor is adjusted to match the reference resistance value by making the resistance value of the selected memristor equal to the closest reference resistance value among all the nodes of the reference resistor array. The method also includes steps of writing the resistance value of the selected memristor by applying the same currents to both the memristor and the reference resistor array, generating a current pulse proportional to the difference between the voltage of the selected memristor and the voltage of the closest reference resistor array, applying the current pulse to the selected memristor in a direction in which the resistance value of the selected memristor approaches the resistance value of the closest reference resistor array, and restoring the resistance value of the selected memristor to the original resistance value by applying the same currents to both the memristor and the reference resistor array and generating a current pulse proportional to the difference between the voltage of the selected memristor and the voltage of the closest reference resistor array. The method helps to prevent the resistance value of the memristor from deviating from the original stored value.

Problems solved by technology

Despite many favorable features, memristors have several weaknesses in practice.
One weakness comes from the nonlinearity in the φ vs. q curve, which makes it difficult to determine the proper pulse width for achieving a desired resistance value.
If the nonlinearity is spatially a variant in the die of a chip, which is common in the fabrication process, the difficulty could be very serious.
Another difficulty comes from the property of the memristor which integrates any kind of signals, including noise, which appeared at the memristor and results in the memristors being perturbed from its original pre-set values.

Method used

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Embodiment Construction

[0041]Reference will be now made in detail to the preferred embodiment of the present invention with reference to the attached drawings.

[0042]Characteristics of Memristors

[0043]The principle of the memristor is based on the nonlinear property of basic circuit elements. In the relationships defining basic circuit elements, charge is defined as the time integral of current, namely,

q(t)=∫−∞i(Σ)dτ  (1)

[0044]Equivalently, the current i is the time derivative of the charge q; namely,

i=qt(2)

[0045]Similarly, the flux is φ is defined as the time integral of voltage; namely,

φ(t)=∫−∞v(τ)dτ  (3)

[0046]Equivalently, the voltage v is the derivative of the flux; namely

v=ϕt(4)

[0047]Dividing (4) by (2), we obtain the resistance

R=vi=ϕt•tq=ϕqq=qQ(5)

[0048]Thus, the resistance can be interpreted as the slope at an operating point on the φ-q curve. If the φ-q curve is nonlinear, the resistance will vary with the operating point. For instance, if the φ-q curve is the nonlinear function shown in FIG. 1(a), ...

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Abstract

The present invention relates to a memristor, and more particularly, to a method of implementing a memristor-based multilevel memory using a reference resistor array and a write-in circuit and a read-out / restoration circuit for the memristor-based multilevel memory, in which a memristor can be used as a multilevel memory. In the present invention, a reference resistance value is written in a selected memristor of a memristor array by applying repeatedly the current pulses of which widths are proportional to the difference between the resistances of the selected memristor and the selected node of the reference resistor array.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to memristors, and more particularly, to a method of implementing memristor-based multilevel memories using a reference resistor array, a memristor array, a write-in circuit and a read-out / restoration circuit.[0003]2. Background of the Related Art[0004]In anticipating the end of Moore's law a decade from now, many new approaches to extend the end of this law have been proposed by the memory industry. One approach is to develop the Multi-Level Cell (MLC) technology which stores multiple bits in a multilevel form of information [1], [2] in a memory element. Commercially available MLC NAND memories can store four states per cell in the current technology. Most approaches are the transistor-based PRAM (Phase Change RAM) [3], [4], and [5], except HP's resistance-based RRAM [6], [7]. Recently, Stanley Williams et al. from HP had developed a remarkable memory element, called the memristor, which i...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G11C11/21
CPCG11C11/5685G11C13/0007G11C13/0069G11C2211/562G11C13/004G11C2211/5634
Inventor KIM, HYONGSUKCHUA, LEON O.
Owner IND COOP FOUND CHONBUK NAT UNIV
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