Method of implementing memristor-based multilevel memory using reference resistor array

Abstract

The present invention relates to a memristor, and more particularly, to a method of implementing a memristor-based multilevel memory using a reference resistor array and a write-in circuit and a read-out / restoration circuit for the memristor-based multilevel memory, in which a memristor can be used as a multilevel memory. In the present invention, a reference resistance value is written in a selected memristor of a memristor array by applying repeatedly the current pulses of which widths are proportional to the difference between the resistances of the selected memristor and the selected node of the reference resistor array.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to memristors, and more particularly, to a method of implementing memristor-based multilevel memories using a reference resistor array, a memristor array, a write-in circuit and a read-out / restoration circuit.[0003]2. Background of the Related Art[0004]In anticipating the end of Moore's law a decade from now, many new approaches to extend the end of this law have been proposed by the memory industry. One approach is to develop the Multi-Level Cell (MLC) technology which stores multiple bits in a multilevel form of information [1], [2] in a memory element. Commercially available MLC NAND memories can store four states per cell in the current technology. Most approaches are the transistor-based PRAM (Phase Change RAM) [3], [4], and [5], except HP's resistance-based RRAM [6], [7]. Recently, Stanley Williams et al. from HP had developed a remarkable memory element, called the memristor, which i...

AI Technical Summary

Benefits of technology

[0026]Furthermore, restoration is accompanied to prevent the resistance of the memristor from deviating away from the originally stored value.

Problems solved by technology

Despite many favorable features, memristors have several weaknesses in practice.

One weakness comes from the nonlinearity in the φ vs. q curve, which makes it difficult to determine the proper pulse width for achieving a desired resistance value.

If the nonlinearity is spatially a variant in the die of a chip, which is common in the fabrication process, the difficulty could be very serious.

Another difficulty comes from the property of the memristor which integrates any kind of signals, including noise, which appeared at the memristor and results in the memristors being perturbed from its original pre-set values.

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