Methods of Manufacturing Three Dimensional Semiconductor Devices

Abstract

Provided are methods of manufacturing a three dimensional semiconductor device. The method includes providing a substrate including a cell array region and a peripheral circuit region, forming a peripheral structure on the peripheral circuit region, forming a cell structure being thicker than the peripheral structure in the cell array region, forming an interlayer dielectric to cover the peripheral structure and the cell structure, forming a polishing stop layer on the interlayer dielectric, and planarizing the interlayer dielectric using the polishing stop layer as a planarization stop.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This U.S. non-provisional patent application claims priority under 35 U.S.C. §119 to Korean Patent Application No. 10-2010-0091999, filed on Sep. 17, 2010, in the Korean Intellectual Property Office, the disclosure of which is hereby incorporated by reference.BACKGROUND OF THE INVENTION[0002]Example embodiments of the inventive concepts relate generally to methods of manufacturing a semiconductor device. More particularly, example embodiments of the inventive concepts relate to methods of manufacturing a three dimensional semiconductor device.[0003]Higher integration of semiconductor devices is desired to satisfy consumer demands for superior performance and inexpensive prices for electronic devices. In the case of semiconductor memory devices, since their integration is an important factor in determining product price, increased integration is especially desired. The integration level of typical two-dimensional or planar semiconductor me...

AI Technical Summary

Benefits of technology

[0005]Example embodiments of the inventive concepts provide methods of easily manufacturing highly integrated three dimensional semiconductor devices.

Problems solved by technology

However, the extremely expensive processing equipment needed to increase pattern fineness sets a practical limitation on increasing integration for two-dimensional or planar semiconductor devices.

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