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Sample-and-hold circuit with feedback and noise integration

a sample and hold circuit technology, applied in the field of image sensors, can solve problems such as noise in the circuit, and achieve the effect of reducing noise and high accuracy

Active Publication Date: 2019-11-21
SONY SEMICON SOLUTIONS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This configuration effectively reduces noise in the sample-and-hold circuit, improving the signal-to-noise ratio and maintaining high accuracy in image sensor pixel processing without increasing integration time or capacitance.

Problems solved by technology

In a practical image sensor, however, these ideal conditions and ideal circuit components are not present, and deviations result in noise in the circuit.

Method used

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  • Sample-and-hold circuit with feedback and noise integration
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  • Sample-and-hold circuit with feedback and noise integration

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Embodiment Construction

[0027]In the following description, numerous details are set forth, such as circuit configurations, waveform timings, circuit operations, and the like, in order to provide an understanding of one or more aspects of the present invention. It will be readily apparent to one skilled in the art that these specific details are merely exemplary and not intended to limit the scope of this application.

[0028]Moreover, while the present disclosure focuses mainly on examples in which the various circuits are used in image sensors, it will be understood that this is merely one example of an implementation. It will further be understood that the disclosed circuits can be used in any device in which there is a need to sample a signal and / or convert an analog signal to a digital signal; for example, an audio signal processing circuit, an industrial measurement and control circuit, a memory array, and so on.

[0029][Image Sensor]

[0030]FIG. 1 illustrates an image sensor 100. The image sensor 10 includ...

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Abstract

A sample-and-hold circuit comprises a sampling capacitor; an amplifier transistor; and a noise reduction circuit including an integration capacitor and a feedback capacitor, the noise reduction circuit being configured to reduce noise via a four-phase operation including: an auto-zero phase in which the feedback capacitor is discharged, a feedback phase in which a gate voltage of the amplifier transistor is partially compensated through the feedback capacitor, an integration phase in which the integration capacitor is charged, and a feedforward phase in which the gate voltage of the amplifier transistor is fully compensated by a voltage on the integration capacitor through the feedback capacitor.

Description

BACKGROUND OF THE INVENTION1. Field of the Invention[0001]This application relates generally to image sensors. More specifically, this application relates to noise reduction in the sample-and-hold circuit of an image sensor.2. Description of Related Art[0002]Image sensing devices typically consist of an image sensor, generally an array of pixel circuits, as well as signal processing circuitry and any associated control or timing circuitry. Within the image sensor itself, charge is collected in a photoelectric conversion device of the pixel circuit as a result of the impingement of light and an electrical signal is generated therefrom. The electrical signal is routed through a collection of analog readout circuits, which may comprise signal amplifiers, signal condition circuits, vertical signal lines (VSLs), sample and hold (S / H) circuits, and analog-to-digital converters (ADCs). Among other operations, the signals from the VSLs are sampled and then converted into digital values by A...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H04N5/357G11C27/02H04N5/378
CPCH04N5/3575H04N5/378G11C27/026H04N25/616H04N25/78H04N25/75
Inventor ESHEL, NOAMZEITUNI, GOLAN
Owner SONY SEMICON SOLUTIONS CORP