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Probe card having groups of probe needles in a probing test apparatus for testing semiconductor integrated circuits

a technology for integrated circuits and probe needles, which is applied in the direction of individual semiconductor device testing, semiconductor/solid-state device testing/measurement, instruments, etc., can solve the problems of increasing the manufacturing cost of semiconductor integrated circuits and more chips will be determined to be defective, so as to improve the productivity of semiconductor integrated circuits and reduce the manufacturing cos

Inactive Publication Date: 2009-12-01
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a probe card that can enhance the productivity of semiconductor integrated circuits and reduce manufacturing costs. The probe card has groups of probe needles that can test semiconductor integrated circuits simultaneously. The probe card receives a test signal from the tester and supplies it to the semiconductor integrated circuits through the groups of probe needles. It also receives response signals from the semiconductor integrated circuits through the groups of probe needles and supplies them to the tester. This helps to reduce the time for performing probing tests on semiconductor integrated circuits and increase manufacturing efficiency.

Problems solved by technology

However, the more IC chips are tested simultaneously, the more chips will be determined to be defective though they are actually flawless.
This would increase the manufacturing cost of the semiconductor integrated circuit.

Method used

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  • Probe card having groups of probe needles in a probing test apparatus for testing semiconductor integrated circuits
  • Probe card having groups of probe needles in a probing test apparatus for testing semiconductor integrated circuits
  • Probe card having groups of probe needles in a probing test apparatus for testing semiconductor integrated circuits

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Experimental program
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first embodiment

[0043]FIG. 3 is a perspective view showing a probe card 15 according to the invention, along with a semiconductor wafer 1. FIG. 4 is a magnified plan view of a part of the card 15. As FIG. 3 illustrates, 84 IC chips 3 are provided on the wafer 1, arranged in rows and columns.

[0044]The probe card 15 is designed to probe-test the chips 3. It comprises eight groups 19a to 19h of probe needles, a substrate 20 and probe contacts 21. The probe needles of the groups 19a to 19h can contact eight chips 3a to 3h arranged in four rows and two columns. The card substrate 20 has a rectangular through hole 17 having two short sides and two long sides. The first to fourth groups 19a to 19d of needles are provided on the card substrate 20 along one long side of the hole 17, and the fifth to eighth groups 19e to 19h of needles are provided on the card substrate 20 along the other long side of the hole 17. In other words, the groups 19a to 19h of needles are arranged in two rows, each row consisting ...

second embodiment

[0055]Arranged as shown in FIG. 6, the wires of the groups 37a to 37h are shorter than otherwise, and the difference in length between the longest and shortest wires provided is relatively small. Hence, the differences in resistance and capacitance among the wires is proportionally small. In addition, since the wires are short, the crosstalk among the wires is small. The probe card 15 can therefore help accomplish high-accuracy probing test, in which eight chips are tested at the same time.

[0056]Another probe card 15 according to the third embodiment of this invention will be described, with reference to FIG. 7 which is an exploded view. The third embodiment is similar to the first embodiment. It is characterized in that the substrate 20 is designed so as to reduce the crosstalk among the wires.

[0057]As illustrated in FIG. 7, the substrate 20 is composed of seven layers 20-1 to 20-7. Probe contacts 21 are mounted on the first layer 20-1. This probe card 15 is designed for use in te...

third embodiment

[0058]Since the wires 37 of each type are provided on one layer, not together with the wires of any other type, the crosstalk among the wires 37 is far less than in the case all wires are arranged densely on one and the same layer. The probe card 15 can, therefore, help to achieve high-accuracy probing test. It has eight groups of probe needles and can serve to test eight chips at the same time.

[0059]The third embodiment can be used in combination with the probe card according to the second embodiment.

[0060]Methods of probe-testing semiconductor integrated circuits by using the probe card according to the invention will be described as the fourth, fifth and sixth embodiments.

[0061]FIG. 8 is a diagram explaining the probe-testing method according to the fourth embodiment. This method can test more chips at the same time than is possible by using the probe card 15 according to the first embodiment.

[0062]As shown in FIG. 8, four test stations43-1 to 43-4 are provided for one tester 41...

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Abstract

A probe card which can help to enhance the productivity of semiconductor integrated circuits manufacturing and to reduce the manufacturing cost thereof, and a method of probe-testing semiconductor integrated circuits by using the probe card. The probe card is designed to test semiconductor integrated circuits formed on a semiconductor wafer and arranged in rows and columns. It has groups of probe needles provided to contact semiconductor integrated circuits arranged in two columns and at least two rows. The card receives a test signal from a test device and supplies the test signal simultaneously to these semiconductor integrated circuits arranged in two columns and at least tow rows, through the groups of probe needles. It receives response signals simultaneously from the semiconductor integrated circuits through the groups of probe needles and then supplies the response signals to the tester.

Description

[0001]More than one reissue application has been filed for the reissue of U.S. Pat. No. 5,818,249. This is a continuation of application Ser. No. 09 / 686,200 filed Oct. 5, 2000, now U.S. Pat. No. RE40105 issued on Feb. 26, 2008, which is a reissue application of U.S. Pat. No. 5,818,249 issued Oct. 6, 1998. This continuation application also claims benefit of priority under 35 U.S.C. §119 to Japanese Patent Application No. 7-249531, filed on Sep. 27, 1995.<?insert-end id="INS-S-00001" ?>BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a probe card for testing semiconductor integrated circuits and also to a method of probe-testing semiconductor integrated circuits by using the probe card.[0004]2. Description of the Related Art[0005]Probing test is performed on semiconductor integrated circuits for their electrical characteristics. The test is carried out after the wafer process and before the dicing process, namely after the integra...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): G01R31/02G01R1/073G01R31/26G01R31/28H01L21/66
CPCG01R1/07342G01R31/2831H01L22/00
Inventor MOMOHARA, TOMOMI
Owner KK TOSHIBA